HEF4047B_15 Datasheet, PDF (1/21 Pages) NXP Semiconductors – Monostable/astable multivibrator

HEF4047B
Monostable/astable multivibrator
Rev. 4 — 15 September 2014
Product data sheet
1. General description
The HEF4047B consists of a gatable astable multivibrator incorporating logic techniques
to permit positive or negative edge-triggered monostable multivibrator action with
retriggering and external counting options.
Inputs include +TRIGGER, TRIGGER, ASTABLE, ASTABLE, RETRIGGER and MR
(master reset). Buffered outputs are O, O and OSCILLATOR OUTPUT. In all modes of
operation an external capacitor (C_t) must be connected between CTC and RCTC, and an
external resistor (R_t) must be connected between RTC and RCTC.
A HIGH level on the ASTABLE input enables astable operation. The period of the square
wave at O and O outputs is a function of the external components employed. ‘True’ input
pulses on the ASTABLE or ‘complement’ pulses on the ASTABLE input, allow the circuit to
be used as a gatable multivibrator. The OSCILLATOR OUTPUT period is half of the O
output in the astable mode. However, a 50% duty factor is not guaranteed at this output.
In the monostable mode, positive edge-triggering is accomplished by applying a
leading-edge pulse to the +TRIGGER input and a LOW level to the TRIGGER input. For
negative edge-triggering, a trailing-edge pulse is applied to the TRIGGER and a HIGH
level to the +TRIGGER. Input pulses may be of any duration relative to the output pulse.
The multivibrator can be retriggered (on the leading-edge only) by applying a common
pulse to both the RETRIGGER and +TRIGGER inputs. In this mode, the output pulse
remains HIGH as long as the input pulse period is shorter than the period determined by
the RC components.
An external count down option implements coupling O to an external ‘N’ counter and
resetting the counter with the trigger pulse. The counter output pulse is fed back to the
ASTABLE input and has a duration equal to N times the period of the multivibrator. A
HIGH level on the MR input assures no output pulse during an ON-power condition. This
input can also be activated to terminate the output pulse at any time. In the monostable
mode, a HIGH level or power-ON reset pulse must be applied to MR, whenever V_DD is
applied.
2. Features and benefits
2.1 General
 Monostable (one-shot) or astable (free-running) operation
 True and complemented buffered outputs
 Only one external resistor and capacitor required