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BUK98150-55A_15 Datasheet, PDF (1/13 Pages) NXP Semiconductors – N-channel TrenchMOS logic level FET
BUK98150-55A
N-channel TrenchMOS logic level FET
19 March 2014
Product data sheet
1. General description
Logic level N-channel enhancement mode Field-Effect Transistor (FET) in a plastic
package using TrenchMOS technology. This product has been designed and qualified to
the appropriate AEC standard for use in automotive critical applications.
2. Features and benefits
• Low conduction losses due to low on-state resistance
• Q101 compliant
• Suitable for logic level gate drive sources
3. Applications
• 12 V and 24 V loads
• Automotive and general purpose power switching
• Motors, lamps and solenoids
4. Quick reference data
Table 1. Quick reference data
Symbol
Parameter
Conditions
VDS
drain-source voltage Tj ≥ 25 °C; Tj ≤ 150 °C
ID
drain current
VGS = 5 V; Tsp = 25 °C; Fig. 2; Fig. 3
Ptot
total power dissipation Tsp = 25 °C; Fig. 1
Static characteristics
RDSon
drain-source on-state
resistance
VGS = 4.5 V; ID = 5 A; Tj = 25 °C
VGS = 10 V; ID = 5 A; Tj = 25 °C
VGS = 5 V; ID = 5 A; Tj = 25 °C; Fig. 12;
Fig. 13
Dynamic characteristics
QGD
gate-drain charge
VGS = 5 V; ID = 5 A; VDS = 44 V;
Tj = 25 °C; Fig. 14
Avalanche ruggedness
EDS(AL)S
non-repetitive drain-
source avalanche
energy
ID = 5.5 A; Vsup ≤ 55 V; RGS = 50 Ω;
VGS = 5 V; Tj(init) = 25 °C; unclamped
Min Typ Max Unit
-
-
55
V
-
-
5.5 A
-
-
8
W
-
-
161 mΩ
-
116 137 mΩ
-
128 150 mΩ
-
2.8 -
nC
-
-
22
mJ
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