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BSP100 Datasheet, PDF (1/8 Pages) NXP Semiconductors – N-channel enhancement mode TrenchMOS transistor
Philips Semiconductors
N-channel enhancement mode
TrenchMOS™ transistor
Product specification
BSP100
FEATURES
SYMBOL
• ’Trench’ technology
• Low on-state resistance
• Fast switching
• High thermal cycling performance
• Low thermal resistance
d
g
s
QUICK REFERENCE DATA
VDSS = 30 V
ID = 6 A
RDS(ON) ≤ 100 mΩ (VGS = 10 V)
RDS(ON) ≤ 200 mΩ (VGS = 4.5 V)
GENERAL DESCRIPTION
N-channel enhancement mode
field-effect transistor in a plastic
envelope
using
’trench’
technology.
Applications:-
• Motor and relay drivers
• d.c. to d.c. converters
• Logic level translator
The BSP100 is supplied in the
SOT223 surface mounting
package.
PINNING
PIN
DESCRIPTION
1 gate
2 drain
3 source
4 drain (tab)
SOT223
4
1
2
3
LIMITING VALUES
Limiting values in accordance with the Absolute Maximum System (IEC 134)
SYMBOL PARAMETER
CONDITIONS
VDSS
VDGR
VGS
ID
Drain-source voltage
Drain-gate voltage
Gate-source voltage
Continuous drain current
IDM
PD
Tj, Tstg
Pulsed drain current
Total power dissipation
Operating junction and
storage temperature
Tj = 25 ˚C to 150˚C
Tj = 25 ˚C to 150˚C; RGS = 20 kΩ
Tsp = 25 ˚C
Tsp = 100 ˚C
Tamb = 25 ˚C
Tsp = 25 ˚C
Tsp = 25 ˚C
MIN.
-
-
-
-
-
-
-
-
- 65
MAX.
30
30
± 20
61
4.4
3.2
24
8.3
150
UNIT
V
V
V
A
A
A
A
W
˚C
THERMAL RESISTANCES
SYMBOL
Rth j-sp
Rth j-amb
PARAMETER
Thermal resistance junction to
solder point
Thermal resistance junction to
ambient
CONDITIONS
surface mounted, FR4
board
surface mounted, FR4
board
TYP.
12
70
MAX.
15
-
UNIT
K/W
K/W
1 Continuous current rating limited by package
February 1999
1
Rev 1.000