74LVT16652A_15 Datasheet, PDF (1/21 Pages) NXP Semiconductors – 3.3 V 16-bit bus transceiver/register; 3-state

74LVT16652A
3.3 V 16-bit bus transceiver/register; 3-state
Rev. 03 — 12 January 2005
Product data sheet
1. General description
The 74LVT16652A is a high-performance BiCMOS product designed for V_CC operation at
3.3 V. The device can be used as two 8-bit transceivers or one 16-bit transceiver.
Complimentary output enable (OEAB and OEBA) inputs are provided to control the
transceiver functions. Select control (SAB and SBA) inputs are provided to select whether
real-time or stored data is transferred. A LOW input level selects real-time data, and a
HIGH input level selects stored data. The circuitry used for select control eliminates the
typical decoding glitch that occurs in a multiplexer during the transition between stored
and real-time data.
Data on the A or B bus, or both, can be stored in the internal flip-flops by LOW-to-HIGH
transitions at the appropriate clock (CPAB or CPBA) inputs regardless of the levels on the
select control or output enable inputs. When SAB and SBA are in real-time transfer mode,
it is possible to store data without using the internal D-type flip-flops by simultaneously
enabling OEAB and OEBA. In this configuration, each output reinforces its input. Thus,
when all other data sources to the two sets of bus lines are at high- impedance, each set
of bus lines remains at its last level configuration.
2. Features
s 16-bit bus interface
s 3-state buffers
s Output capability: +64 mA and −32 mA
s TTL input and output switching levels
s Input and output interface capability to systems at 5 V supply
s Bus-hold data inputs eliminate the need for external pull-up resistors to hold unused
inputs
s Live insertion and extraction permitted
s Power-up reset
s Power-up 3-state
s No bus current loading when output is tied to 5 V bus
s Latch-up protection exceeds 500 mA per JESD78
s ESD protection:
x MIL STD 883 method 3015: exceeds 2000 V
x Machine model: exceeds 200 V