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74LVC_LVCH162244A_15 Datasheet, PDF (1/15 Pages) NXP Semiconductors – 16-bit buffer/line driver; 30 series termination resistors; 5 V tolerant input/output; 3-state | |||
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74LVC162244A; 74LVCH162244A
16-bit buffer/line driver; 30 ï series termination resistors; 5 V
tolerant input/output; 3-state
Rev. 6 â 16 December 2011
Product data sheet
1. General description
The 74LVC162244A; 74LVCH162244A are 16-bit non-inverting buffer/line drivers with
3-state bus compatible outputs. The device can be used as four 4-bit buffers, two 8-bit
buffers or one 16-bit buffer. It features four output enable inputs, (1OE to 4OE) each
controlling four of the 3-state outputs. A HIGH on nOE causes the outputs to assume a
high-impedance OFF-state. The device is designed with 30 ï series termination resistors
in both HIGH and LOW output stages to reduce line noise.
Inputs can be driven from either 3.3 V or 5 V devices. When disabled, up to 5.5 V can be
applied to the outputs. These features allow the use of these devices in mixed
3.3 V and 5 V applications.
The 74LVCH162244A bus hold on data inputs eliminates the need for external pull-up
resistors to hold unused inputs.
2. Features and benefits
ï® 5 V tolerant inputs/outputs for interfacing with 5 V logic
ï® Wide supply voltage range from 1.2 V to 3.6 V
ï® CMOS low power consumption
ï® Multibyte flow-through standard pin-out architecture
ï® Low inductance multiple power and ground pins for minimum noise and ground
bounce
ï® Direct interface with TTL levels
ï® High-impedance when VCC = 0 V
ï® All data inputs have bus hold. (74LVCH162244A only)
ï® Complies with JEDEC standard:
ïµ JESD8-7A (1.65 V to 1.95 V)
ïµ JESD8-5A (2.3 V to 2.7 V)
ïµ JESD8-C/JESD36 (2.7 V to 3.6 V)
ï® ESD protection:
ïµ HBM JESD22-A114F exceeds 2000 V
ïµ MM JESD22-A115-B exceeds 200 V
ïµ CDM JESD22-C101E exceeds 1000 V
ï® Specified from ï40 ï°C to +85 ï°C and ï40 ï°C to +125 ï°C
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