74LVC157A_15 Datasheet, PDF (1/17 Pages) NXP Semiconductors – Quad 2-input multiplexer

74LVC157A
Quad 2-input multiplexer
Rev. 7 — 25 November 2011
Product data sheet
1. General description
The 74LVC157A is a quad 2-input multiplexer which select four bits of data from two
sources under the control of a common select input (S). The four outputs present the
selected data in the true (non-inverted) form. The enable input (E) is active LOW. When
pin E is HIGH, all of the outputs (1Y to 4Y) are forced LOW regardless of all the other
input conditions. Moving the data from two groups of registers to four common output
buses is a common use of the 74LVC157A. The state of the common data select input (S)
determines the particular register from which the data comes. It can also be used as
function generator.
It is useful for implementing highly irregular logic by generating any 4 of the 16 different
functions of two variables with one variable common.
The device is the logic implementation of a 4-pole, 2-position switch, where the position of
the switch is determined by the logic levels applied to pin S.
Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these
devices as translators in mixed 3.3 V and 5 V applications.
2. Features and benefits
 5 V tolerant inputs for interfacing with 5 V logic
 Wide supply voltage range from 1.2 V to 3.6 V
 CMOS low power consumption
 Direct interface with TTL levels
 Complies with JEDEC standard:
 JESD8-7A (1.65 V to 1.95 V)
 JESD8-5A (2.3 V to 2.7 V)
 JESD8-C/JESD36 (2.7 V to 3.6 V)
 ESD protection:
 HBM JESD22-A114F exceeds 2000 V
 MM JESD22-A115-B exceeds 200 V
 CDM JESD22-C101E exceeds 1000 V
 Specified from 40 C to +85 C and 40 C to +125 C