74LV4066_15 Datasheet, PDF (1/23 Pages) NXP Semiconductors – Quad bilateral switches

74LV4066
Quad bilateral switches
Rev. 03 — 4 July 2005
Product data sheet
1. General description
The 74LV4066 is a low-voltage Si-gate CMOS device that is pin and function compatible
with the 74HC4066 and 74HCT4066.
The 74LV4066 has four independent switches. Each switch has two input/output pins
(nY, nZ) and an active HIGH enable input pin (nE). When nE is LOW the corresponding
analog switch is turned off.
The 74LV4066 has a ON-resistance which is reduced in comparison with the 74HCT4066.
2. Features
s Optimized for low-voltage applications: 1.0 V to 3.6 V
s Typical V_OLP (output ground bounce): < 0.8 V at V_CC = 3.3 V and T_amb = 25 °C
s Accepts TTL input levels between V_CC = 2.7 V and V_CC = 3.6 V
s Very low ON-resistance:
x 60 Ω (typical) at V_CC = 2.0 V
x 35 Ω (typical) at V_CC = 3.0 V
x 25 Ω (typical) at V_CC = 4.5 V
s ESD protection:
x HBM EIA/JESD22-A114C exceeds 2000 V
x MM EIA/JESD22-A115-A exceeds 200 V
s Specified from −40 °C to +80 °C and from −40 °C to +125 °C