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74CBTLV3384_15 Datasheet, PDF (1/18 Pages) NXP Semiconductors – 10-bit bus switch with 5-bit output enables
74CBTLV3384
10-bit bus switch with 5-bit output enables
Rev. 2 — 16 December 2011
Product data sheet
1. General description
The 74CBTLV3384 is a dual 5-pole, single-throw bus switch. The device features two
output enable inputs (nOE) that each control five switch channels. The switches are
disabled when the associated nOE input is HIGH. Schmitt-trigger action at control inputs
makes the circuit tolerant of slower input rise and fall times. This device is fully specified
for partial power-down applications using IOFF. The IOFF circuitry disables the output,
preventing the damaging backflow current through the device when it is powered down.
2. Features and benefits
 Supply voltage range from 2.3 V to 3.6 V
 High noise immunity
 Complies with JEDEC standard:
 JESD8-5 (2.3 V to 2.7 V)
 JESD8-B/JESD36 (2.7 V to 3.6 V)
 ESD protection:
 HBM JESD22-A114F exceeds 2000 V
 MM JESD22-A115-A exceeds 200 V
 CDM AEC-Q100-011 revision B exceeds 1000 V
 5  switch connection between two ports
 Rail to rail switching on data I/O ports
 CMOS low power consumption
 Latch-up performance exceeds 250 mA per JESD78B Class I level A
 IOFF circuitry provides partial Power-down mode operation
 Multiple package options
 Specified from 40 C to +85 C and 40 C to +125 C