74AUP2GU04_15 Datasheet, PDF(1/19 Page) NXP Semiconductors

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74AUP2GU04_15 Datasheet, PDF (1/19 Pages) NXP Semiconductors – Low-power dual unbuffered inverter

74AUP2GU04

Low-power dual unbuffered inverter

Rev. 5 â 11 October 2013

Product data sheet

1. General description

The 74AUP2GU04 provides two unbuffered inverting gates.

This device ensures a very low static and dynamic power consumption across the entire

VCC range from 0.8 V to 3.6 V.

2. Features and benefits

ï® Wide supply voltage range from 0.8 V to 3.6 V

ï® High noise immunity

ï® ESD protection:

ïµ HBM JESD22-A114F Class 3A exceeds 5000 V

ïµ MM JESD22-A115-A exceeds 200 V

ïµ CDM JESD22-C101E exceeds 1000 V

ï® Low static power consumption; ICC = 0.9 ïA (maximum)

ï® Latch-up performance exceeds 100 mA per JESD 78 Class II

ï® Inputs accept voltages up to 3.6 V

ï® Multiple package options

ï® Specified from ï40 ï°C to +85 ï°C and ï40 ï°C to +125 ï°C

3. Ordering information

Table 1. Ordering information

Type number

Package

Temperature range Name

74AUP2GU04GW ï40 ï°C to +125 ï°C SC-88

74AUP2GU04GM ï40 ï°C to +125 ï°C XSON6

74AUP2GU04GF ï40 ï°C to +125 ï°C XSON6

74AUP2GU04GN ï40 ï°C to +125 ï°C XSON6

74AUP2GU04GS ï40 ï°C to +125 ï°C XSON6

Description

Version

plastic surface-mounted package; 6 leads

SOT363

plastic extremely thin small outline package; no leads; SOT886

6 terminals; body 1 ï´ 1.45 ï´ 0.5 mm

plastic extremely thin small outline package; no leads; SOT891

6 terminals; body 1 ï´ 1 ï´ 0.5 mm

extremely thin small outline package; no leads;

6 terminals; body 0.9 ï´ 1.0 ï´ 0.35 mm

SOT1115

extremely thin small outline package; no leads;

6 terminals; body 1.0 ï´ 1.0 ï´ 0.35 mm

SOT1202

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