74ALVC125_15 Datasheet, PDF (1/13 Pages) NXP Semiconductors – Quad buffer/line driver; 3-state

74ALVC125
Quad buffer/line driver; 3-state
Rev. 02 — 10 January 2008
Product data sheet
1. General description
The 74ALVC125 is a quad non-inverting buffer/line driver with 3-state outputs. The 3-state
outputs (nY) are controlled by the output enable input (nOE). A HIGH on the nOE pin
causes the outputs to assume a high-impedance OFF-state.
2. Features
s Wide supply voltage range from 1.65 V to 3.6 V
s 3.6 V tolerant inputs/outputs
s CMOS low power consumption
s Direct interface with TTL levels (2.7 V to 3.6 V)
s Power-down mode
s Latch-up performance exceeds 250 mA
s Complies with JEDEC standards:
x JESD8-7 (1.65 V to 1.95 V)
x JESD8-5 (2.3 V to 2.7 V)
x JESD8B/JESD36 (2.7 V to 3.6 V)
s ESD protection:
x HBM JESD22-A114E exceeds 2000 V
x MM JESD22-A 115-A exceeds 200 V
3. Ordering information
Table 1. Ordering information
Type number Package
Temperature range Name
Description
74ALVC125D −40 °C to +85 °C SO14
plastic small outline package; 14 leads;
body width 3.9 mm
74ALVC125PW −40 °C to +85 °C
TSSOP14 plastic thin shrink small outline package; 14 leads;
body width 4.4 mm
74ALVC125BQ −40 °C to +85 °C
DHVQFN14 plastic dual in-line compatible thermal enhanced very
thin quad flat package; no leads; 14 terminals;
body 2.5 × 3 × 0.85 mm
Version
SOT108-1
SOT402-1
SOT762-1