74AHC3GU04 Datasheet, PDF (1/17 Pages) NXP Semiconductors – high-speed Si-gate CMOS device

74AHC3GU04
Inverter
Rev. 01 — 5 March 2004
Product data sheet
1. General description
The 74AHC3GU04 is a high-speed Si-gate CMOS device. This device provides the
inverting single stage function.
2. Features
s Symmetrical output impedance
s High noise immunity
s ESD protection:
x HBM EIA/JESD22-A114-A exceeds 2000 V
x MM EIA/JESD22-A115-A exceeds 200 V
x CDM EIA/JESD22-C101 exceeds 1000 V.
s Low power dissipation
s Balanced propagation delays
s SOT505-2 and SOT765-1 package
s Output capability ±8 mA drive
s Specified from −40 °C to +85 °C and from −40 °C to +125 °C.
3. Quick reference data
Table 1: Quick reference data
GND = 0 V; T_amb = 25 °C; t_r = t_f ≤ 3.0 ns.
Symbol Parameter
Conditions
Min Typ Max Unit
t_PHL, t_PLH
propagation delay nA to nY V_CC = 5 V;
C_L = 15 pF
-
2.5
5.5
ns
C_I
input capacitance
C_PD
power dissipation
capacitance
-
[1] _-
[2]
3.0
10
pF
4
-
pF
[1] C_PD is used to determine the dynamic power dissipation (P_D in µW).
P_D = C_PD × V_CC2 × f_i × N + Σ(C_L × V_CC2 × f_o) where:
f_i = input frequency in MHz;
f_o = output frequency in MHz;
C_L = output load capacitance in pF;
V_CC = supply voltage in Volts;
N = total load switching outputs;
Σ(C_L × V_CC2 × f_o) = sum of the outputs.
[2] The condition is V_I = GND to V_CC.