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74AHC2G241 Datasheet, PDF (1/19 Pages) NXP Semiconductors – Dual buffer/line driver; 3-state
74AHC2G241; 74AHCT2G241
Dual buffer/line driver; 3-state
Rev. 01 — 10 March 2004
Product data sheet
1. General description
The 74AHC2G241; 74AHCT2G241 is a high-speed Si-gate CMOS device.
The 74AHC2G241; 74AHCT2G241 is a dual non-inverting buffer/line driver with 3-state
outputs. The 3-state outputs are controlled by the output enable inputs 1OE and 2OE. A
HIGH level at pin 1OE causes output 1Y to assume a high-impedance OFF-state. A LOW
level at pin 2OE causes output 2Y to assume a high-impedance OFF-state.
Schmitt-trigger action at all inputs makes the circuit highly tolerant for slower input rise
and fall times.
2. Features
s Symmetrical output impedance
s High noise immunity
s ESD protection:
x HBM EIA/JESD22-A114-A exceeds 2000 V
x MM EIA/JESD22-A115-A exceeds 200 V
x CDM EIA/JESD22-C101 exceeds 1000 V.
s Low power dissipation
s Balanced propagation delays
s SOT505-2 and SOT765-1 package
s Specified from −40 °C to +85 °C and from −40 °C to +125 °C.
3. Quick reference data
Table 1: Quick reference data
GND = 0 V; Tamb = 25 °C; tr = tf ≤ 3.0 ns.
Symbol Parameter
Conditions
Min Typ Max Unit
Type 74AHC2G241
tPHL, tPLH propagation delay nA to nY
tPZH, tPZL enable time1OE to 1Y
enable time 2OE to 2Y
tPHZ, tPLZ disable time1OE to 1Y
disable time 2OE to 2Y
CI
input capacitance
CPD
power dissipation
capacitance
CL = 15 pF; VCC = 5 V
-
CL = 15 pF; VCC = 5 V
-
CL = 15 pF; VCC = 5 V
-
CL = 15 pF; VCC = 5 V
-
CL = 15 pF; VCC = 5 V
-
-
CL = 50 pF; f = 1 MHz [1] [2] -
3.4 5.5 ns
3.6 5.1 ns
3.6 5.6 ns
4.1 6.8 ns
4.3 6.8 ns
1.5 10 pF
10 -
pF