74AHC2G126 Datasheet, PDF (1/20 Pages) NXP Semiconductors – Dual buffer/line driver; 3-state

74AHC2G126; 74AHCT2G126
Dual buffer/line driver; 3-state
Rev. 02 — 21 September 2004
Product data sheet
1. General description
The 74AHC2G126; AHCT2G126 is a high-speed Si-gate CMOS device.
The 74AHC2G126; AHCT2G126 provides a dual non-inverting buffer/line driver with
3-state output. The 3-state output is controlled by the output enable input (OE). A LOW at
pin nOE causes the output to assume a high-impedance OFF-state.
2. Features
s Symmetrical output impedance
s High noise immunity
s ESD protection:
x HBM EIA/JESD22-A114-B exceeds 2000 V
x MM EIA/JESD22-A115-A exceeds 200 V
x CDM EIA/JESD22-C101 exceeds 1000 V.
s Low power dissipation
s Balanced propagation delays
s Multiple package options
s Specified from −40 °C to +85 °C and from −40 °C to +125 °C.
3. Quick reference data
Table 1: Quick reference data
GND = 0 V; T_amb = 25 °C; t_r = t_f ≤ 3.0 ns.
Symbol Parameter
Conditions
Min Typ Max Unit
Type 74AHC2G126
t_PHL, t_PLH propagation delay
nA to nY
C_L = 15 pF; V_CC = 5 V
-
3.4 5.5 ns
C_I
input capacitance
-
1.5 10 pF
C_PD
power dissipation
capacitance
C_L = 50 pF; f_i = 1 MHz ^{[1] [2]} -
10 -
pF