74AHC1G09 Datasheet, PDF (1/11 Pages) NXP Semiconductors – 2-input AND gate with open-drain output

74AHC1G09
2-input AND gate with open-drain output
Rev. 01 — 26 September 2005
Product data sheet
1. General description
The 74AHC1G09 is a high-speed Si-gate CMOS device.
The 74AHC1G09 provides the 2-input AND function with open-drain output.
The output of the 74AHC1G09 is an open drain and can be connected to other open-drain
outputs to implement active-LOW, wired-OR or active-HIGH wired-AND functions. For
digital operation this device must have a pull-up resistor to establish a logic HIGH level.
2. Features
s High noise immunity
s ESD protection:
x HBM JESD22-A114-C exceeds 2000 V
x MM JESD22-A115-A exceeds 200 V
s Low power dissipation
s Specified from −40 °C to +85 °C and from −40 °C to +125 °C.
3. Quick reference data
Table 1: Quick reference data
GND = 0 V; T_amb = 25 °C; t_r = t_f ≤ 3.0 ns.
Symbol
Parameter
Conditions
t_PZL, t_PLZ
propagation delay V_CC = 4.5 V to 5.5 V;
A and B to Y
C_L = 15 pF
C_i
input capacitance
C_PD
power dissipation C_L = 50 pF; f_i = 1 MHz;
capacitance
V_I = GND to V_CC
Min Typ Max Unit
-
3.2 5.5 ns
-
1.5 10 pF
[1] _-
5
-
pF
[1] C_PD is used to determine the dynamic power dissipation (P_D in µW).
P_D = C_PD × V_CC2 × f_i × N + (C_L × V_CC2 × f_o) where:
f_i = input frequency in MHz;
f_o = output frequency in MHz;
C_L = output load capacitance in pF;
V_CC = supply voltage in Volts;
N = number of inputs switching;
(C_L × V_CC2 × f_o) = dissipation due to the output if the combination of the pull up voltage and resistance
results in V_CC at the output.