PI6CVF857 Datasheet, PDF (7/14 Pages) Pericom Semiconductor Corporation – 1:10 PLL Clock Driver for 2.5V DDR-SDRAM Memory

PI6CVF857
1:10 PLL Clock Driver for
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AC Specifications for PC1600 ~ PC2700
Switching characteristics over recommended operating free-air temperature range (unless otherwise noted)( See Figure 1 & 2 )
Parameter
Description
tjit(cc)
t(θ)
tsk(o)
tjit(per)
tjit(hper)
tsl(i)
tsl(o)
V_OX
Cycle-to-cycle jitter
Static phase offset⁽¹⁾
Output clock skew
Period jitter
Half-period jitter
Input clock slew rate
Output clock slew rate⁽²⁾
Output differential-pair cross-voltage
Diagram
Figure 4
Figure 5
Figure 6
Figure 7
Figure 8
Figure 9
Figure 9
AV_DD, V_DDQ = 2.5V ±0.2V
Min.
Nom.
Max
–50
50
–50
0
50
75
–75
75
–100
100
1.0
4.0
1.0
2.0
(V_DDQ/2) –0.1
(V_DDQ/2) +0.1
Units
ps
V/ns
V
The PLL is capable of meeting all the above parameters while supporting SSC synthesizers with the following parameters
SSC modulation frequency
30.00
50.00
SSC clock input frequency deviation
0.00
PLL loop bandwidth⁽⁴⁾
2
–0.50
Phase angle
–0.031
Notes:
1. Static Phase offset does not include Jitter.
2. The Output Skew Rate is calculated by using the load shown in Figure 3.
3. V_OX specified at the DRAM clock input or the test load in Figure 2.
4. The SSC requirements meet the Intel PC100 SDRAM Registered DIMM specification.
kHz
%
MHz
degrees
7
PS8683B
10/17/03