PS4051 Datasheet, PDF (4/9 Pages) Pericom Semiconductor Corporation – 17V CMOS Analog Multiplexers/Switches

PS4051/PS4052/PS4053
17V CMOS Analog Multiplexers/Switches
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Electrical Specifications - Dual Supplies (continued)
(V± = ±5V ±10%, GND = 0V, V_AH = V_IH = 2.4V, V_AL = V_IL = 0.8V)
Parameter
Symbol
Conditions
Temp (°C) Min⁽¹⁾ Typ⁽²⁾ Max⁽¹⁾ Units
Dynamic
Transition Time
Break-Before-Make
TimeDelay
t_TRANS Figure 1
t_OPEN Figure 3
75
250
25
2
10
Turn-OnTime
t_{O N}
Figure 2
50
175
ns
Full
225
Turn-Off Time
t_{O F F}
Figure 2
25
40
150
Full
200
Charge Injection⁽³⁾
Q
C_L= 1nF, V_S = 0V, R_S = 0Ω,
Off Isolation⁽⁷⁾
OIRR
C_L = 15pF, V_INH = 5V, R_L = 50Ω,
f = 100kHz,V_NO = 1V_RMS
Crosstalk
X_TALK
C_L = 15pF, R_L = 50Ω,
f = 100kHz,
Figure 6, V_NO = 1V_RMS
Logic Input
Capacitance
C_IN
f =1MHz
25
NO Off Capacitance
C_{NO (OFF)} f =1MHz, V_NO = 0V
COM Off
Capacitance
C_{COM (OFF)} f =1MHz, V_COM =0V
PS4051
PS4052
PS4053
2
10
pC
–90
dB
–92
8
2
2
pF
2
PS4051
8
COM On
Capacitance
C_{COM (ON)} f =1MHz, V_COM = 0V
PS4052
PS4053
8
Supply
Power-Supply Range
±2.7
±8
V
Positive Supply Current
I+
Negative Supply
Current
I–
V_INH = V_A = 0V or V+,
V+ =5.5V, V– = –5.5V
Full
–10
10
µA
Notes:
1. The algebraic convention, where most negative value is a minimum and most positive is a maximum, is used in this data sheet.
2. Typical values are for DESIGN AID ONLY, not guaranteed or subject to production testing.
3. Guaranteed by design
4. ∆R_ΟΝ = R_ΟΝ max - R_ΟΝ min
5. Flatness is defined as the difference between the maximum and minimum values of on-resistance measured over the specific
analog signal range, i.e., V_NO = 3V to 0 and 0V to –3V.
6. Leakage parameters are 100% tested at maximum rated hot temperature and guaranteed by correlation at +25ºC.
7. Off Isolation = 20log₁₀ V_COM / V_NO. See Figure 5.
4
PS8461 02/16/00