PI2EQX3201 Datasheet, PDF (4/7 Pages) Pericom Semiconductor Corporation – 3.2Gbps 2 Differential Channel Serial Re-driver with built-in Equalization and De-emphasis

PI2EQX3201
3.2Gbps 2 Differential Channel Serial Re-driver
with built-in Equalization and De-emphasis
AC/DC Electrical Characteristics (V_DD = 1.8 ±0.1V)
Symbol
Parameter
Conditions
Ps
Supply Power
EN = LVCMOS Low
EN = LVCMOS High
Latency
From input to output
Min. Typ. Max. Units
0.1
W
0.3
2.0
ns
CML Receiver Input
RL_RX
V_RX-DIFFP-P
Return Loss
Differential Input Peak-to-
peak Voltage
V_RX-CM-ACP
AC Peak Common Mode
Input Voltage
Z_RX-DIFF-DC
DC Differential Input
Impedance
Z_RX-DC
DC Input Impedance
50 MHz to 1.25 GHz
12
dB
0.175
1.200 V
150 mV
80 100 120
Ω
40
50
60
Equalization
J_RS
Residual Jitter^(1,2)
J_RM
Random Jitter^(1,2)
Total Jitter
Deterministic jitter
0.3
Ulp-p
0.2
1.5
psrms
Notes
1. K28.7 pattern is applied differentially at point A as shown in Figure 1.
2. Total jitter does not include the signal source jitter. Total jitter (TJ) = (14.1 × RJ + DJ) where RJ is random RMS jitter and DJ is maximum
deterministic jitter. Signal source is a K28.5 ± pattern (00 1111 1010 11 0000 0101) for the deterministic jitter test and K28.7 (0011111000) or
equivalent for random jitter test. Residual jitter is that which remains after equalizing media-induced losses of the environment of Figure 1 or
its equivalent. The deterministic jitter at point B must be from media-induced loss, and not from clock source modulation. JItter is measured at
0V at point C of Figure 1.
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Figure 1. Test Condition Referenced in the Electrical Characteristic Table
06-0086
4
PS8818
02/28/06