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PT7C43190 Datasheet, PDF (25/32 Pages) Pericom Semiconductor Corporation – Real-time Clock Module
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10.3. How to confirm a setting value for a register and the result of correction
This RTC does not adjust the frequency of the crystal oscillation by using the function of clock correction. Therefore users cannot
confirm if it is corrected or not by measuring output 32.768 kHz. When the function of clock correction is being used, the cycle of
1 Hz clock pulse output from the INT pin changes once in 20 times or 60 times, as shown in below figure.
Confirmation of the clock correction
Measure a and b by using the frequency counter*1. Calculate the average frequency (Tave) based on the measurement results.
Calculate the error of the clock based on the average frequency (Tave). The following shows an example for confirmation.
Confirmation example: When B0 =0, 66h is set
Measurement results: a = 1.000080 Hz, b = 0.998493 Hz
Calculating the average frequency allows to confirm the result of correction.
*1. Use a high-accuracy frequency counter of 7 digits or more.
Caution Measure the oscillation frequency under the usage conditions.
11. Serial Interface
11.1. 3-wire Serial Interface
The PT7C43190 receives various commands via 3-wire serial interface to read / write data. Regarding transmission is as follows.
a. Data reading
When data is input from the SIO pin in synchronization with the falling of the SCK clock after setting the CS pin to "H", the data
is loaded internally in synchronization with the next rising of the SCK clock. When R / W bit = "1" is loaded at the eighth rising of
the SCK clock, the state of data reading is entered. Data corresponding to each command is then output in synchronization with
the falling of the subsequent SCK clock input. When the SCK clock is less than 8, the IC is in the clock-wait status, and no
processing is performed.
b. Data writing
When data is input from the SIO pin in synchronization with the falling of the SCK clock after setting the CS pin to "H", the data
is loaded internally in synchronization with the next rising of the SCK clock. When R / W bit = "0" is loaded at the eighth rising of
the SCK clock, the state of data writing is entered. In this state, the data, which is input in synchronization with the falling of the
subsequent SCK clock input, is written to registers according to each command. In data writing, input a clock pulse which is
equivalent to the byte of the register. As well as reading, when the SCK clock is less than 8, the IC is in the clock-wait status, and
no processing is performed.
2015-09-0015
PT0274-7 10/16/15
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