PI6C410B Datasheet, PDF (2/15 Pages) Pericom Semiconductor Corporation – Clock Generator for Intel PCI-Express Server Chipset

PI6C410B
Clock Generator for Intel PCI-Express Server Chipset
Pin Descriptions
Pin Name
REF[0:1]
XTAL_IN
XTAL_OUT
CPU[0:3] & CPU[0:3]#
SRC[0:4] & SRC[0:4]#
PCIF[0:2]
PCI[0:3]
USB_48
FS_A
FS_B / TEST_MODE
FS_C / TEST_SEL
IREF
VTT_PWRGD# /
PWRDWN
SDA
SCL
V_{DD_PCI}
V_{DD_48}
V_{DD_SRC}
V_{DD_CPU}
V_{DD_REF}
V_{SS_PCI}
V_{SS_48}
V_{SS_SRC}
V_{SS_CPU}
V_{SS_REF}
V_{DD_A}
V_{SS_A}
Type
Output
Input
Output
Output
Output
Output
Output
Output
Input
Pin No
54, 55
52
51
36, 37; 39, 40; 42,
43; 45, 46
16, 17; 18, 19; 21, 22;
23, 24; 26, 27
9, 10, 11
3, 4, 5, 6
13
48
Input
49
Input
56
Input
33
Input
31
I/O
Input
Power
Power
Power
Power
Power
Ground
Ground
Ground
Ground
Ground
Power
Ground
30
29
1, 8
12
15, 25, 28
38, 44, 47
53
2, 7
14
20
41
50
35
34
Descriptions
3.3V 14.31818 MHz outputs
14.31818 MHz crystal input
14.31818 MHz crystal output
Differential CPU outputs
Differential Serial Reference Clock outputs
33 MHz clocks outputs (free running)
33 MHz clocks outputs
48 MHz clock output
3.3V LVTTL inputs for CPU frequency selection
3.3V LVTTL inputs for CPU frequency selection / Test Mode
select: 0 = Hi-Z, 1 = Ref/N
3.3V LVTTL inputs for CPU frequency selection / Test Mode
select if pulled to 3.3V when Vtt_Pwrgd# is asserted LOW
External resistor connection for internal current reference
3.3V LVTTL Level sensitive strobe used to determine to latch the
FS_A, FS_B/TEST_MODE and FS_C/TEST_SEL inputs (active
low) / 3.3V LVTTL active high input for Power Down operation.
SMBus compatible SDATA
SMBus compatible SCLOCK
3.3V Power Supply for Outputs
3.3V Power Supply for Outputs
3.3V Power Supply for Outputs
3.3V Power Supply for Outputs
3.3V Power Supply for Outputs
Ground for Outputs
Ground for Outputs
Ground for Outputs
Ground for Outputs
Ground for Outputs
3.3V Power Supply for PLL
Ground for PLL
2
PS8811A
02/01/06