PI2EQX3211B Datasheet, PDF (2/5 Pages) Pericom Semiconductor Corporation – 3.2Gbps 2 Differential Channel Serial Re-driver with Equalization, Squelch and Flow-Through Pinout

Pin Description
Pin #
Pin Name
3
AI+
4
AI-
18
AO+
17
AO-
14
BI+
13
BI-
7
BO+
8
20
5, 9, 12, 16
1
10
2, 6, 11, 15, 19
BO-
EN
GND
EQA
EQB
V_DD
PI2EQX3211B
3.2Gbps 2 Differential Channel Serial Re-driver
Equalization, Squelch and Flow-Through Pinout
I/O
I
I
O
O
I
I
O
O
I
PWR
I
I
PWR
Description
Positive CML Input Channel A with internal 50Ω pull down
Negative CML Input Channel A with internal 50Ω pull down
Positive CML Output Channel A with internal 50Ω pull up to VDD during normal
operation and 2kΩ when EN=0. Drives to output common mode voltage when
input is <V_TH–.
Negative CML Output Channel A with internal 50Ω pull up to VDD during normal
operation and 2kΩ when EN=0. Drives to output common mode voltage when
input is <V_TH–.
Positive CML Input Channel B with internal 50Ω pull down
Negative CML Input Channel B with internal 50Ω pull down
Positive CML Output Channel B with internal 50Ω pull up to VDD during normal
operation and 2kΩ when EN=0. Drives to output common mode voltage when
input is <V_TH–.
Negative CMLOutput Channel B with internal 50Ω pull up to VDD during normal
operation and 2kΩ when EN=0. Drives to output common mode voltage when
input is <V_TH–.
EN is the enable pin. A LVCMOS high provides normal operation. A LVCMOS
low selects a low power down mode.
Supply Ground
Selection pins for equalizer (see Equalizer Selection Table)
w/ 50KΩ internal pull up
1.8V Supply Voltage
Equalizer Selection
EQx
Compliance Channel
0
[0:2.5dB] @ 1.6 GHz
1
[4.5:6.5dB] @ 1.6 GHz
07-0193
2
PS8901A
08/23/07