PT7C4363_13 Datasheet, PDF (16/20 Pages) Pericom Semiconductor Corporation – Real-time Clock Module

PT7C4363
Real-time Clock Module (I²C Bus)
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Vcc
R_P R_P
SDA
SCL
Master
MCU
Slave
RTC
Other Peripheral
Device
Note: When there is only one master, the MCU is ready for driving SCL to "H" and R _P of SCL may not required.
Fig.4 System configuration
c) Starting and Stopping I²C Bus Communications
Fig.5 Starting and stopping on I²C bus
START condition, repeated START condition, and STOP condition
 START condition
SDA level changes from high to low while SCL is at high level
 STOP condition
SDA level changes from low to high while SCL is at high level
 Repeated START condition (RESTART condition)
In some cases, the START condition occurs between a previous START condition and the next STOP condition, in
which case the second START condition is distinguished as a RESTART condition. Since the required status is the same as for the
START condition, the SDA level changes from high to low while SCL is at high level.
d) Data Transfers and Acknowledge Responses during I²C-BUS Communication
 Data transfers
Data transfers are performed in 8-bit (1 byte) units once the START condition has occurred. There is no limit on the amount
(bytes) of data that are transferred between the START condition and STOP condition.
The address auto increment function operates during both write and read operations.
2013-06-0002
PT0207-6 06/18/13
16