PS391ESEE Datasheet, PDF (10/12 Pages) Pericom Semiconductor Corporation – Precision, Quad, SPST, Analog Switches

PS391/PS392/PS393
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Test Circuits/Timing Diagrams
V_{COM = +3V(for ton),}
-3V(for toff)
Logic
Input
COM
+12V
V+
NO
or NC
IN
GND
R_L
300Ω
V_OUT
C_L
35pF
Logic ^+3V
Input
0V
Switch
Output
0V
50%
V_OUT
90%
t_ON
tr <20ns
tf <20ns
t_OFF
90%
C_L INCLUDES FIXTURE AND STRAY CAPACITANCE
( ) ^{VOUT = VCOM}
R_L
R_{L +} R_ON
LOGIC INPUT WAVEFORMS INVERTED FOR
SWITCHES THAT HAVE OPPOSITE LOGIC
Figure 1. Switching Time
+5V
V_COM1= +3V
V_COM3= +3V
Logic
Input
COM
COM
IN
GND
V+
NO
NC
V-
V_OUT3
R_L2 C_L2
V_OUT1
R_L1 C_L1
-5V
R_L= 300Ω
C_L = 35pF
C_L INCLUDES FIXTURE AND STRAY CAPACITANCE
+3V
Logic
Input
0V
Switch
Output 1
(V_OUT1) ^0V
Switch
Output3
(V_OUT3)
0V
50%
90%
t_D
Figure 2. Break-Before-Make Interval (PS393 only)
90%
t_D
V_GEN
R_{GEN COM}
+5V
V+
NO or
NC
Logic
Input
IN
GND V-
-5V
V_OUT
C_L
1nF
V_OUT
IN _OFF
OFF
IN
ON
ON
Q = (∆V_OUT)(C_L)
Figure 3. Charge Injection
∆V_OUT
OFF
OFF
10
PS8168E 09/16/02