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PI90LVB179 Datasheet, PDF (1/14 Pages) Pericom Semiconductor Corporation – 3.3V Boost LVDS High-Speed Differential Line Drivers and Receivers
PI90LVB179/PI90LVB180/
PI90LVB050/PI90LVB051 111222333444555666777888999000111222333444555666777888999000111222333444555666777888999000111222111222333444555666777888999000111222333444555666777888999000111222333444555666777888999000111222111222333444555666777888999000111222333444555666777888999000111222333444555666777888999000111222111222333444555666777888999000111222333444555666777888999000111222333444555666777888999000111222111222333444555666777888999000111222
3.3V Boost LVDS High-Speed Differential Line Drivers and Receivers
Product Features
• Signaling Rates >660 Mbps (330 MHz)
• Single 3.3V Power Supply Design
• Driver:
— ±350mV Differential Swing into a 50 ohm load
— Propogation Delay of 1.5ns Typ.
— Low Voltage TTL (LVTTL) Inputs are 5V Tolerant
— Driver is High Impedance when Disabled or VCC < 1.5V
• Receiver:
— Accepts ±50mV (min.) Differential Swing with up to 2.0V
ground potential difference
— Propagation Delay of 3.3ns Typ.
— Low Voltage TTL (LVTTL) Outputs
— Open, Short, and Terminated Fail Safe
• Industrial Temperature Operating Range: –40°C to 85°C
• Package Options: SOIC, TSSOP, MSOP
• Bus-TerminalESD>12kV
PI90LVB179
VCC
ROUT
DIN
GND
1
8
2 8-Pin 7
3 U, W 6
4
5
RIN+
RIN
DOUT
DOUT+
DIN
ROUT
DOUT+
DOUT-
RIN+
RIN-
Product Description
The PI90LVB179, PI90LVB180, PI90LVB050, and PI90LVB051 are
differential line drivers and receivers (transceivers) that are similar
to the IEEE 1596.3 SCI and ANSI/TIA/EIA-644 LVDS standards (the
difference is that the driver output current is doubled). This modi-
fication enables true half-duplex operation with more than one LVDS
driver or with two line transmission resistors over a 50 ohm differen-
tial transmission line. These devices use low-voltage differential
signaling (LVDS) to achieve data rates in excess of 660 Mbps while
being less susceptible to noise than single-ended transmission.
The drivers translate a low-voltage TTL/CMOS input into a low-
voltage (350mV typical) differential output signal into a 50-ohm load.
The receivers translate a differential 350mV input signal to a 3V CMOS
output level. Driver section can be independently set to a power-down
and high-impedance output mode with the DEN pin (active HIGH).
Receiver section is controlled by the REN* pin (active LOW).
Applications
Applications include point-to-point and multidrop baseband data
transmission over a controlled impedance media of approximately 50
ohms. These include intra-system connections via printed circuit
board traces or cables, hubs and routers for data communi- cations;
PBXs, switches, repeaters and base stations for telecommunications
and other applications such as digital cameras, printers and copiers.
PI90LVB050
RIN1
RIN1+
ROUT1
REN*
ROUT2
RIN2+
RIN2
GND
1
16
2
15
3
4
16-Pin1143
5 L, W 12
6
11
7
10
8
9
VCC
DIN1
DOUT1+
DOUT1
DEN
DOUT2
DOUT2+
DIN2
DIN1
DEN
DIN2
ROUT1
REN*
ROUT2
DOUT1+
DOUT1-
DOUT2+
DOUT2-
RIN1+
RIN1-
RIN2+
RIN2-
PI90LVB180
NC
ROUT
REN*
DEN
DIN
GND
GND
1
14
2
13
3 14-Pin12
4
5
L, W
11
10
6
9
7
8
VCC
VCC
RIN+
RIN
DOUT
DOUT+
NC
DIN
DEN
REN*
ROUT
DOUT+
DOUT-
RIN+
RIN-
PI90LVB051
RIN1
RIN1+
ROUT1
DEN1
ROUT2
RIN2+
RIN2
GND
1
16
2
15
3
4
16-Pin
14
13
5 L, W 12
6
11
7
10
8
9
VCC
DIN1
DOUT1+
DOUT1
DEN2
DOUT2
DOUT2+
DIN2
DIN1
DEN1
ROUT1
DIN2
DEN2
ROUT2
DOUT1+
DOUT1-
RIN1+
RIN1-
DOUT2+
DOUT2-
RIN2+
RIN2-
1
PS8540
05/01/01