PI90LV3811 Datasheet, PDF (1/9 Pages) Pericom Semiconductor Corporation – High-Speed Differential Line Drivers

PI90LV3811/PI90LVB3811
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High-Speed Differential Line Drivers
Features
• Ten line drivers meet or exceed the requirements of
the ANSI EIA/TIA-644 Standard
• Designed for signaling rates up to 660 Mbps with very
low radiation (EMI)
• Low voltage differential signaling with typical output
voltage of 350mV into a:
100-ohm load (PI90LV3811)
50-ohm load (PI90LVB3811)
• Propagation delay times less than 2.9ns
• Output skew is less than 150ps
• Part-to-part skew is less than 1.5ns
• 35mW total power dissipation in each driver operating
at 200 MHz
• Driver is high impedance when disabled or with V_CC <1.5V
• Bus-pin ESD protection exceeds 10kV
• Low voltage TTL (LVTTL) logic inputs are 5V tolerant
• Package: 48-Pin TSSOP (A)
PI90LV3811 & PI90LVB3811
Description
The PI90LV3811 and PI90LVB3811 consist of ten differential line
drivers that implement the electrical characteristics of low-voltage
differential signaling (LVDS). This signaling technique lowers out-
put voltage levels to reduce the power, increase switching speeds,
and allow operation with a 3V supply rail. Any current-mode LVDS
driver will deliver a minimum differential output voltage magnitude
of 247mV into a 100-Ohm load (PI90LV3811) or 50-Ohm load
(PI90LVB3811) when enabled. The PI90LVB3811 doubles the output
drive current to achieve LVDS levels with a 50-Ohm load.
The intended application of this device and signaling technique
is for point-to-point baseband (single termination) and multipoint
(double termination) data transmission over a controlled impedance
media of approximately 100-Ohms. The transmission media may be
printed-circuit board traces, backplanes, or cables. The large number
of drivers integrated into the same substrate, along with the low pulse
skew of balanced signaling, allows extremely precise timing align-
ment of clock and data for synchronous parallel data transfers. When
used with its companion 10-channel receivers, the PI90LV3810 or
PI90LVR3810, over 300 million data transfers per second in single-
edge clocked systems are possible with very little power.
(Note: The ultimate rate and distance of data transfer is dependent
upon attenuation characteristics of the media, the noise coupling to
the environment, and other system characteristics.)
The drivers are enabled in groups of five. When disabled, the driver
outputs are a high impedance. Each driver input (D_IN) and enable (EN)
have an internal pulldown that will drive the input to a low level when
open circuited.
The PI90LV3811 and PI90LVB3811 are characterized for operation
from –40°C to 85°C.
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PS8663
02/21/03