PI90LV047A_08 Datasheet, PDF (1/7 Pages) Pericom Semiconductor Corporation – 3V LVDS Quad Flow-Through Differential Line Driver

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3V LVDS Quad Flow-Through
Differential Line Driver
Features
• >500 Mbps (250 MHz) switching rates
• Flow-through pinout simplifies PCB layout
• Low Voltage Differential Signaling with output voltages
of ±350mV into:
– 100-ohm load (PI90LV047)
• 300ps typical differential skew
• 400psmaximumdifferentialskew
• 1.7ns maximum propagation delay
• 3.3V power supply design
• ±350mVdifferentialsignaling
• Bus-Pin ESD protection >10kV
• Interoperable with existing 5V LVDS receivers
• High impedance on LVDS outputs on power down
• Conforms to TIA/EIA-644 LVDS Standard
• Industrial operating temperature range (–40°C to +85°C)
• Packages (Pb-free & Green Available):
– 16-pin SOIC (W)
– 16-pin TSSOP (L)
Description
The PI90LV047A is a quad flow-through differential line driver
designed for applications requiring ultra-low power dissipation and
high data rates. This device is designed to support data rates in
excess of 400 Mbps (200 MHz) using Low Voltage Differential
Signaling (LVDS) technology.
The PI90LV047A accept low-voltage TTL/CMOS input levels and
translates them to low-voltage (350 mV) differential output signals.
In addition, the driver supports a 3-state function that may be used
to disable the output stage, disabling the load current, and thus
dropping the device to an ultra low idle power state of 13mW typical.
This device has a flow-through pinout for easy PCB layout.
The EN and EN inputs are banded together and control the 3-state
outputs.
The intended application of this device and signaling technique is
for point-to-point baseband (PI90LV047A) data transmission over
controlled impedance media.
Block Diagram
Pin Configuration
D_IN1
D1
D_IN2
D2
D_IN3
D3
D_IN4
D4
EN
EN
D_OUT1+
D_OUT1–
D_OUT2+
D_OUT2–
D_OUT3+
D_OUT3–
D_OUT4+
D_OUT4–
EN
1
D_IN1
2
D_IN2
3
V_CC
4
GND 5
D_IN3
6
D_IN4
7
EN
8
16
D_OUT1–
15
D_OUT1+
14
D_OUT2+
13
D_OUT2–
12
D_OUT3–
11
D_OUT3+
10
D_OUT4+
9
D_OUT4–
Truth Table
Enables
Input Outputs
EN
EN
D_IN D_OUT+ D_OUT–
L
L
H
H
L or Open
H
H
L
All other combinations of ENABLE inputs X
Z
Z
08-0295
1
PS8611C
11/11/08