PI90LV03 Datasheet, PDF (1/7 Pages) Pericom Semiconductor Corporation – SOTiny LVDS Repeater

PI90LV03/PI90LVB03
SOTiny^™ LVDS Repeater
Features
• Complies with ANSI/TIA/EIA-644-A LVDS standard
• LVDS receiver inputs accept LVPECL signals
• Low jitter 660 Mbps fully differential data path
• Bus-Terminal ESD exceeds 2kV
• Single +3.3V supply voltage operation
• Receiver Differential Input Voltage Threshold < ±100mV
• Receiver open-circuit failsafe
• Low-Voltage Differential Signaling with typical Output Volt-
ages of 350mV into:
– 100Ω Load (PI90LV03)
– 50Ω Load (PI90LVB03)
• Typical Propagation Delay Times of 1.5ns
• Typical Power Dissipation of 20mW @ 200 MHz
• Outputs are High Impedance with V_CC < 1.5V
• Industrial Temperature Range: –40°C to 85°C
• Packaging:
- 6-pin space-saving SOT-23 (T)
Function Table
Inputs
Outputs
V_ID = V_A - V_B
V_Y - V_Z
V_ID > 50mV
H
50mV < V_ID < 50mV
X
V_ID ≤ -50mV
L
Open
H
Notes:
1. H = high level; L = low level; X = indeterminate
Block Diagram
A1
B2
5
Y
4
Z
Pin Configuration
A 1 6 VDD
B2 5 Y
GND ₃ 4 Z
Description
PI90LV03 and PI90LVB03 are single LVDS Repeaters that use
low-voltage differential signaling (LVDS) to support data rates up
to 660 Mbps. The PI90LVB03 features high-drive output. Both
products are designed for applications requiring high-speed, low-
power consumption, low-noise generation, and a small package.
The LVDS Repeaters take an LVDS input signal and provide an
LVDS output to address various interface logic requirements such
as signal isolation, repeater, stub length, and Optical Transceiver
Modules. In many large systems, signals are distributed across
backplanes, and the distance between the transmission line and the
unterminated receivers are one of the limiting factors for system
speed. The buffers can be used to reduce the ‘stub length’ by stra-
tegic device placement along the trace length. They can improve
system performance by allowing the receiver to be placed very
close to the main transmission line or very close to the connector
on the card. Longer traces to the LVDS receiver can then be placed
after the buffer.
The buffer’s wide input dynamic range enables them to receive dif-
ferential signals from LVPECL and LVDS sources. The devices can
be used as compact high-speed serial translators between LVPECL
and LVDS data lines. The differential translation provides a simple
way to mix and match Optical Transceiver ICs from various vendors
without redesigning the interfaces.
Applications
The PI90LV03 and PI90LVB03 provide differential translation
between LVDS and PECL devices for high-speed, point-to-point
interface and telecom applications:
– ATM
– SONET/SDH
– Switches
– Routers
– Add-Drop Multiplexers
High-Speed Differential Cable Repeater Application
RT = Z_O
TX
ZO
LVDS Repeater
Any LVDS RX
RT = ZO
ZO
1
PS8660A
07/07/04