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PI90LV024_04 Datasheet, PDF (1/12 Pages) Pericom Semiconductor Corporation – LVDS Dual 2x2 Crosspoint/Repeater Switch
PI90LV024, PI90LVB024
LVDS Dual 2x2 Crosspoint/Repeater Switch
Features
• Dual 2x2 Crosspoint/Repeater Switch
• Meets or Exceeds the Requirements of ANSI TIA/
EIA-644-1995
• Designed for Signaling Rates up to 650 Mbit/s (325 MHz)
• Operates from a 3.3V Supply: –40°C to 85°C
• Low Voltage Differential Signaling with Output Voltages
of ±350mV into:
– 100Ω load (PI90LV024)
– 50Ω load Bus LVDS Signaling (PI90LVB024)
• Accepts ±350mV differential inputs
• Wide common mode input range: 0.2V to 2.7V
• Output drivers are high impedance when disabled or when
VCC ≤ 1.5V
• Inputs are open, short, and terminated fail safe
• Propagation Delay Time: 3.5ns
• ESD protection is 10kV on bus pins
• Bus Pins are High Impedance when disabled or with
VCC less than 1.5V
• TTL Inputs are 5V Tolerant
• Power Dissipation at 400Mbit/s of 250mW
• Packaging (Pb-free & Green Available):
– 28-pin QSOP (Q)
– 28-pin TSSOP (L)
Block Diagram
Description
The PI90LV024 and PI90LVB024 are monolithic dual 2x2
asynchronous crosspoint/repeater switches. The crosspoint func-
tion is based on a multiplexer tree architecture. Each 2x2 switch
can be considered as a pair of 2:1 multiplexers that share the same
inputs. The signal path through each switch is fully differential
with minimal propagation delay. The signal path is unregistered,
so no clock is required for the data inputs. The signal line drivers
and receivers use Low Voltage Differential Signaling (LVDS) to
achieve signaling rates as high as 650 Mbps.
The LVDS standard provides a minimum differential output voltage
magnitude of 247mV into a 100Ω load and receipt of 100mV signals
with up to 1V of ground potential difference between a transmitter
and receiver. The PI90LVB024 doubles the output drive current to
achieve Bus LVDS signaling levels with a 50Ω load.
The intended application of these devices is for loop-through and
redundant channel switching for both point-to-point base-band
(PI90LV024) and multipoint (PI90LVB024) data transmissions
over controlled impedance media. The package pin assignments
enables easy routing for applications requiring signal feedback.
Pin Configuration
S0/S1
1A/1B
2A/2B
3Y/3Z
4Y/4Z
3DE/4DE
1DE/2DE
1Y/1Z
2Y/2Z
3A/3B
4A/4B
S2/S3
1B
1
1A
2
S0
3
1DE
4
S1
5
2A
6
2B
7
GND
8
4Y
9
4Z
10
4DE
11
3Z
12
3Y
13
VCC
14
28
VCC
27
1Y
26
1Z
25
2DE
24
2Z
23
2Y
22
GND
21
4B
20
4A
19
S3
18
3DE
17
S2
16
3A
15
3B
1
PS8486B
08/19/04