PI90LV019 Datasheet, PDF (1/9 Pages) Pericom Semiconductor Corporation – Single Bus LVDS Transceiver

PI90LV019
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Single Bus LVDS Transceiver
Features
• Balanced Output Impedance
• Light Bus Loading: 5pF typical
• Glitch-free power up/down (Driver Disabled)
• High Signaling Rate Capability: >500 Mbps
• Driver:
– ±350mV Differential Swing into:
– 100-ohm load (PI90LV019)
• Receiver:
– Accepts ±50mV (min.) Differential Swing with up to 2.0V
ground potential difference
– Propagation Delay of 3.3ns typ.
– Low Voltage TTL (LVTTL) Outputs
– Open, Short, and Terminated Fail Safe
• Bus terminal ESD exceeds 9kV
• Industrial Temperature Operation (–40°C to +85°C)
• Packaging: (Pb-free & Green available)
14-lead SOIC (W) and 14-lead TSSOP (L)
Description
The PI90LV019, differential line driver and receiver (transceiver),
is compliant to IEEE1596.3 SCI and ANSI/TIA/
EIA-644LVDS standards. The logic interface provides maximum
flexibility resulting from four separate lines that are provided: D_IN,
DE, RE, and R_OUT. These devices also feature flow through which
allows easy PCB routing for short stubs between the bus pins and
the connector.
The driver translates between TTL levels (single-ended) to Low
Voltage Differential Signaling levels. This allows for high-speed
operation, while consuming minimal power with reduced EMI. In
addition the differential signaling provides common mode noise
rejection of ±1V.
Block Diagram
DIN
DE
RE
ROUT
Pin Configuration
D0+
DE 1
14 VCC
D_IN 2
13 NC
D0–
NC 3 _14-Pin 12 DO+
R_OUT 4 ^{L, W} 11 DO–
NC 5
10 RI+
RI+
NC 6
9 RI–
RI–
GND 7
8 RE
06-0018
1
PS8614C
03/06/06