PI7C9X20505GP Datasheet, PDF (1/1 Pages) Pericom Semiconductor Corporation – PCIe® Packet Switch - 5-Port/5-lane

Product:
PCIe^® Packet Switch - 5-Port/5-lane
Part Numbers: PI7C9X20505GP GreenPacket^TM Family
Product Description
The PI7C9X20505GP is a 5-port, 5-lane, PCI Express^®
Packet Switch specifically designed to meet the latest
GREEN low-power, lead (Pb)-free system requirements,
such as laptop, docking station, and other mobile or power
sensitive platforms. The name of the family, GreenPacket^™,
refers to Pericom proprietary power saving technology.
The PI7C9X20505GP provides one upstream port
supporting x1, and 4 downstream ports that support x1
operation. The PI7C9X20505GP provides users the flexibility
to expand or fanout from a wide range of I/O Bridge such as
MCH, ICH, nVidia, and it is a suitable solution for HBA,
Surveillance, Combo card and other applications.
Industry Specifications Compliance
PCI Express^® Base Specification, Revision 1.1
PCI Express CEM Specification, Revision 1.1
PCI-to-PCI^® Bridge Architecture Specification, Rev 1.2
Advanced Configuration Power Interface (ACPI)
Specification
PCI Standard Hot-Plug Controller (SHPC) and
Subsystem Specification Revision 1.0
Features
Non-blocking full-wired switching capability at 16 Gbps
when all 4 lanes are enabled
Peer-to-peer switching between any 2 downstream
ports
Reliability, Availability and Serviceability
o Supports Data Poisoning and End-to-End CRC
o Advanced Error Reporting and Logging
o Hot Plug support
o IEEE 1149.6 JTAG interface support
Link Power Management
o Supports L0, L0s, L1, L2, L2/L3_Ready and L3 link
power state
o Active state power management for L0s and L1
state
o Beacon or Wake# support in L2 state
Device State Power Management
o Supports D0, D3_Hot and D3_Cold
o 3.3V Aux Power support in D3_Cold power state
Port Arbitration: Round Robin (RR), Weighted RR and
Time-based Weighted RR
Extended Virtual Channel capability:
o Two Virtual Channels (VC) and Eight Traffic
Class (TC) support
o Non-enabled VC buffer assigned to enabled
VCs for resource sharing
o Independent TC/VC mapping per each port
o Provides VC arbitration selections: Strict
Priority, Round Robin (RR) and Programmable
Weighted RR
Supports Isochronous Traffic
o Isochronous traffic class mapped to VC1 only
o Strict time based credit policing
Header/Data queue at each VC of each port
o Four-entry non-posted request header and
data (VC0 only) queue
o Four-entry posted request header queue
o Four-entry completion header queue
o 512-byte posted write data buffer
o 512-byte completed read data buffer
Supports up to 256-byte maximum payload size
Power Dissipation: 0.75W typical in L0 normal mode
Industrial Temperature Range -40^o to 85^o
Package: 17x17mm, 256-pin PBGA, w/1.0mm ball pitch
- Pb free and 100% Green.
Enhanced Features
Programmable Driver Current and De-Emphasis Level
at each individual port
150ns typical latency for packet running through switch
without blocking
Supports “Cut-through”(Default) as well as “Store and
Forward” mode for switching packets
Supports up to 256-byte maximum payload size
Advanced Power Savings
o Empty downstream ports are set to idle
o Clock to corresponding circuit is turned off
when any port enters L1 or ASPM L1
Application
Host
CPU
I/O
Bridge
x1 PCIe
PI7C9X20505
GP
x1 PCIe
PCIe
Endpoint
PCIe
Endpoint
PCIe
Endpoint
PCIe
Endpoint
Page 1 of 1
Pericom Semiconductor Corp.
www.pericom.com
8/7/2008
MPB080002B
PCI^®, PCIe^® and PCI Express^® are registered trademarks of the PCI SIG^® (www.pcisig.org) | GreenPacket™ is a trademark of Pericom Semiconductor