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PI74LVTCH16244 Datasheet, PDF (1/7 Pages) Pericom Semiconductor Corporation – 3.3V 16-Bit Buffer/Line Driver with 3-State Outputs
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3.3V 16-Bit Buffer/Line Driver
with 3-State Outputs
Product Features
· Advanced low power CMOS design for 2.7V to 3.6V
Vcc operation
· Supports 5V input/output tolerance in mixed signal mode
operation
· Function compatible with LVT family of products
· Balanced ±24mA output drive
· Typical VOGB (Output Ground Bounce) <0.8V at VCC=3.3V,
TA=25°C
· Ioff and Power Up/Down 3-State support live insertion
· Bus Hold on data inputs eliminates the need for external
pull-up/down resistors
· Latch-up performance exceeds 200mA Per JESD78
· ESD protection exceeds JESD 22
– 2000V Human-Body Model (A114-B)
– 200V Machine Model (A115-A)
· Industrial Temperature: –40°C to +85°C
· Available Packages (Pb-free & Green available):
– 48-pin 240-mil wide plastic TSSOP (A)
Logic Block Diagram
1OE 1
1A1 47
1A2 46
1A3 44
1A4 43
2 1Y1
3 1Y2
5 1Y3
6 1Y4
3OE 25
3A1 36
3A2 35
3A3 33
3A4 32
13 3Y1
14 3Y2
16 3Y3
17 3Y4
Product Description
The PI74LVTCH16244 is a non-inverting 16-bit buffer and line
driver designed for low-voltage 2.7V to 3.6V VCC operation, with the
capability of interfacing to the 5V system environment. This buffer/
driver is designed specifically to improve both the performance and
density of 3-State memory address drivers, clock drivers, and bus-
oriented receivers and transmitters. The device can be used as four
4-bit buffers, two 8-bit buffers, or one 16-bit buffer.
The PI74LVTCH16244 has "Bus Hold" which retains the data
input's last valid logic state whenever the data input goes to high-
impedance, preventing "floating" inputs and eliminating the need
for pull-up/down resistors.
When Vcc is between 0 to 1.5V during power up or power down,
the device is in the high-impedance state. To ensure the high-
impedance state above 1.5V, OE should be tied to Vcc through a
pullup resistor; the minimum value of the resistor is determined by
the current sinking capability of the driver.
The device fully supports live-insertion with its Ioff and power-up/
down 3-state. The Ioff circuitry disables the outputs when the
power is off, preventing the backflow of damaging current through
the device. Power-up/down 3-state places the outputs in the high-
impedance state during power up or power down, preventing driver
conflict.
2OE 48
2A1 41
40
2A2
38
2A3
37
2A4
8 2Y1
9 2Y2
11 2Y3
12 2Y4
4OE 24
4A1 30
29
4A2
27
4A3
26
4A4
19 4Y1
20
4Y2
22
4Y3
23
4Y4
06-0214
1
PS8650B
06/05/06