PI74FCT377T Datasheet, PDF (1/3 Pages) Pericom Semiconductor Corporation – FAST CMOS OCTAL D FLIP-FLOP WITH CLOCK ENABLE

PI74FCT377T
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PI74FCT377T
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Product Features:
• The PI74FCT377T is pin compatible with bipolar FAST™
Series at a higher speed and lower power
consumption
• TTL input and output levels
• Octal D flip-flops with Clock Enable
• Extremely low static power
• Hysteresis on all inputs
• Industrial operating temperature range: –40°C to +85°C
• Packages available:
– 20-pin 173 mil wide plastic TSSOP (L)
– 20-pin 300 mil wide plastic DIP (P)
– 20-pin 150 mil wide plastic QSOP (Q)
– 20-pin 150 mil wide plastic TQSOP (R)
– 20-pin 300 mil wide plastic SOIC (S)
Fast CMOS Octal D Flip-Flop
with Clock Enable
Product Description:
Pericom Semiconductor’s PI74FCT series of logic circuits are pro-
duced in the Company’s advanced 0.6/0.8 micron CMOS technology,
achieving industry leading speed grades.
The PI74FCT377T is an 8-bit wide octal designed with eight edge-
triggered D-type flip-flops with individual D inputs and O outputs.
When Clock Enable (CE) is LOW, the common buffered Clock
(CP) loads all flip-flops simultaneously. The register is fully edge-
triggered. D input state, one setup time before the LOW-to-HIGH
clock transition, is transferred to the corresponding flip-flop’s O
output. The CE input must be stable only one setup time prior to
the LOW-to-HIGH transition for predictable operation.
Logic Block Diagram
D0
D1
D2
D3
D4
D5
D6
D7
CE
DQ
DQ
DQ
DQ
DQ
DQ
DQ
DQ
CP
CP
CP
CP
CP
CP
CP
CP
CP
O0
O1
O2
O3
O4
O5
O6
O7
Product Pin Configuration
CE 1
20 Vcc
O0 2
19 O7
D0 3 ^20-PIN 18 D7
D1 4 ^L20 17 D6
O1 5 ^P20 16 O6
O2
D2
D3
6
7
8
Q20
R20
S20
15
14
13
O5
D5
D4
O3 9
12 O4
GND 10
11 CP
Product Pin Description
Truth Table⁽¹⁾
Pin Name Description
Inputs
Outputs
CE
CP
D0-D7
O0-O7
Clock Enable (Active LOW)
Clock Pulse Input
Data Inputs
Data Outputs
Mode
Load "1"
Load "0"
Hold
CP CE DN ON
↑
l
hH
↑
l
lL
↑ h X NC
GND
Ground
(Do Nothing) H H X NC
VCC
Power
1. H = HIGH Voltage Level
h = HIGH Voltage Level one setup time
prior to the LOW-to-HIGH Clock
Transition
L = LOW Voltage Level
l = LOW Voltage Level one setup time
prior to the LOW-to-HIGH Clock
Transition
X = Don't Care
NC = No Change
↑ = LOW-to-HIGH Clock Transition
1
PS2017A 03/11/96