PI74AVC Datasheet, PDF (1/9 Pages) Pericom Semiconductor Corporation – 2.5V 20-Bit Universal Bus Driver with 3-State Outputs

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2.5V 20-Bit Universal Bus
Driver with 3-State Outputs
Product Features
• PI74AVC+16836 is designed for low voltage operation,
VCC = 1.65V to 3.6V
• True ±24mA Balanced Drive @ 3.3V
• I_OFF supports partial power-down operation
• 3.6V I/O Tolerant inputs and outputs
• Meets PC133 SDRAM Registered DIMM Specifications
• All outputs contain a patented DDC
(Dynamic Drive Control) circuit that reduces noise without
degrading propagation delay
• Industrial operation at –40°C to +85°C
• Available Packages:
– 56-pin 240 mil wide plastic TSSOP (A)
– 56-pin 173 mil wide plastic TVSOP (K)
Product Description
Pericom Semiconductor’s PI74AVC+ series of logic circuits are
produced using the Company’s advanced 0.35 micron CMOS
technology, achieving industry leading speed.
The 20-bit PI74AVC+16836 universal bus driver is designed
for 1.65V to 3.6V Vcc operation.
Data flow from A to Y is controlled by the Output Enable (OE) input.
The device operates in the transparent mode when the latch-enable
(LE) input is LOW. When LE is HIGH, the A data is latched if the
clock (CLK) input is held at a high or low logic level. If LE is HIGH,
the A data is stored in the latch/flip-flop on the low-to-high
transition of CLK. When OE is HIGH, the outputs are in the high-
impedance state, but all the inputs are enabled and data is capable
of being stored in the register.
To ensure the high-impedance state during power up or power
down, OE should be tied to Vcc through a pullup resistor; the
minimum value of the resistor is determined by the current-sinking
capability of the driver.
Logic Block Diagram
1
OE
56
CLK
29
LE
A1 ⁵⁵
1D
C1
CLK
2
Y1
TO 19 OTHER CHANNELS
1
PS8511A
02/06/01