PI74ALVCH16827 Datasheet, PDF (1/4 Pages) Pericom Semiconductor Corporation – 20-Bit Buffer/Driver with 3-STATE Outputs

PI74ALVCH16827
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20-Bit Buffer/Driver
with 3-STATE Outputs
Product Features
• PI74ALVCH16827 is designed for low voltage operation
• V_CC = 2.3V to 3.6V
• Hysteresis on all inputs
• Typical V_OLP (Output Ground Bounce)
< 0.8V at V_CC = 3.3V, T_A = 25°C
• Typical V_OHV (Output V_OH Undershoot)
< 2.0V at V_CC = 3.3V, T_A = 25°C
• Bus Hold retains last active bus state during 3-STATE,
eliminating the need for external pullup resistors
• Industrial operation at –40°C to +85°C
• Packages available:
– 56-pin 240 mil wide plastic TSSOP (A)
– 56-pin 300 mil wide plastic SSOP (V)
Product Description
Pericom Semiconductor’s PI74ALVCH series of logic circuits are
produced in the Company’s advanced 0.5 micron CMOS technology,
achieving industry leading speed grades.
The PI74ALVCH16827 is a 20-bit non-inverting buffer/driver
designed for 2.3V to 3.6V Vcc operation.
The buffer/driver is composed of two 10-bit sections with separate
output-enable signals. For either 10-bit buffer section, the two
output-enable (1OE1 and 1OE2 or 2OE1 and 2OE2 inputs must both
be low for the corresponding Y outputs to be active. If either output-
enable input is HIGH, the outputs of that 10-bit buffer section are
in the high-impedance state.
To ensure the high-impedance state during power up or power
down, OE should be tied to Vcc through a pull-up resistor; the
minimum value of the resistor is determined by the current sinking
ability of the driver.
The PI74ALVCH16827 has the “Bus Hold” which retains the data
input’s last state whenever the data input goes to high-impedance
preventing ‘floating” inputs and eliminating the need for pullup/
down resistors.
Logic Block Diagram
1OE1
1
56
1OE2
55
1A1
2 _1Y1
2OE1
28
29
2OE2
42
2A1
15 _2Y1
To 9 other channels
To 9 other channels
1
PS8091A 03/26/97