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PI6LC48H04 Datasheet, PDF (1/11 Pages) Pericom Semiconductor Corporation – PCIe 3.0 and Ethernet Clock Generator with 4 HCSL Outputs | |||
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PI6LC48H04
PCIe® 3.0 and Ethernet Clock Generator with 4 HCSL Outputs
Features
ÃÃPCIe® 3.0/2.0/1.0 compliant
à à PCIe 3.0 Phase jitter - 0.45ps RMS (High Freq. Typ.)
ÃÃLVDS compatible outputs
ÃÃSupply voltage of 3.3V±5% and 2.5V±5%
ÃÃ25MHz crystal or clock input frequency
ÃÃHCSL outputs, 0.7V low power differential pair
ÃÃJitter 35ps cycle-to-cycle (typ)
ÃÃRMS phase jitter 12kHz ~ 20MHz @ 100MHz - 0.32ps (typ)
ÃÃRMS phase jitter 12kHz ~ 20MHz @ 125MHz, 156.25MHz,
200MHz - 0.3ps (typ)
ÃÃIndustrial temperature range
ÃÃPackaging: (Pb-free and Green)
à à 20-pin TSSOP (L20)
Description
The PI6LC48H04 is a clock generator compliant to PCI Express®
3.0/2.0/1.0, Ethernet and other requirements. The device is used
for networking or embedded systems.
The PI6LC48H04 provides four differential (Low Power HCSL)
or LVDS outputs. Using Pericom's patented Phase Locked Loop
(PLL) techniques, the device takes a 25MHz crystal input and
produces four pairs of differential outputs (HCSL) at 156.25MHz,
100MHz, 125MHz, 133.33MHz and 200MHz clock frequencies.
Block Diagram
Pin Configuration (20-Pin TSSOP)
S[1:0]
2
XTAL_IN/CLK
25 MHz
crystal or clock
XTAL_OUT
Pulling
Capacitors
VDDX
Control
Logic
Crystal
Driver
GNDX
VDDOA
Phase
Lock
Loop
OE0&1
Q0+
Q0-
Q1+
Q1-
Q2+
Q2-
Q3+
Q3-
OE
GNDOA VSWING_CTRL
VDDX 1
OE0&1 2
S0 3
S1 4
XTAL_IN/ CLK 5
XTAL_OUT 6
PD# 7
OE 8
GNDX 9
VSwing_Ctrl 10
20 Q0+
19 Q0-
18 Q1+
17 Q1-
16 GNDOA
15 VDDOA
14 Q2+
13 Q2-
12 Q3+
11 Q3-
All trademarks are property of their respective owners.
15-0047
1
www.pericom.com
PI6LC48H04
Rev.A
04/07/2015
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