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PI6LC48H02 Datasheet, PDF (1/9 Pages) Pericom Semiconductor Corporation – PCIe 3.0/2.0/1.0 Clock Generator with 2 HCSL Outputs
PI6LC48H02
PCIe® 3.0/2.0/1.0 Clock Generator with 2 HCSL Outputs
Features
ÎÎPCIe® 3.0/2.0/1.0 compliant
àà PCIe 3.0 Phase jitter - 0.45ps RMS (High Freq. Typ.)
ÎÎLVDS compatible outputs
ÎÎSupply voltage of 3.3V ±10%
ÎÎ25MHz crystal or clock input frequency
ÎÎHCSL outputs, 0.8V Current mode differential pair
ÎÎJitter 35ps cycle-to-cycle (typ)
ÎÎRMS phase jitter 12kHz ~ 20MHz @ 100MHz - 0.32ps (typ)
ÎÎRMS phase jitter 12kHz ~ 20MHz @ 125MHz - 0.3ps (typ)
ÎÎIndustrial temperature range
ÎÎPackaging: (Pb-free and Green)
àà 16-pin TSSOP (L16)
Description
The PI6LC48H02 is a clock generator compliant to PCI Express®
3.0/2.0/1.0 and Ethernet requirements. The device is used for PC
or embedded systems.
The PI6LC48H02 provides two differential (HCSL) or LVDS out-
puts. Using Pericom's patented Phase Locked Loop (PLL) tech-
niques, the device takes a 25MHz crystal input and produces
two pairs of differential outputs (HCSL) at 25MHz, 100MHz,
125MHz, 200MHz clock frequencies.
Block Diagram
Pin Configuration (16-Pin TSSOP)
VDD
S1:S0
2
X1/CLK
25 MHz
crystal or clock X2
Pulling
Capacitors
Control
Logic
Phase
Lock
Loop
Crystal
Driver
GND
RR
OE
CLK0
CLK0
CLK1
CLK1
S0 1
S1 2
NC 3
X1/CLK 4
X2 5
OE 6
GND 7
NC 8
16 VDDX
15 CLK0
14 CLK0
13 GNDA
12 VDDA
11 CLK1
10 CLK1
9 IREF
All trademarks are property of their respective owners.
14-0044
1
www.pericom.com
PI6LC48H02
Rev.C
04/07/2014