PI6CDBL401B Datasheet, PDF (1/16 Pages) Pericom Semiconductor Corporation – 4-Output Low Power PCIE GEN1-2-3 Buffer

PI6CDBL401B
4-Output Low Power PCIE GEN1-2-3 Buffer
Features
ÎÎ4x 100MHz low power HCSL or LVDS compatible outputs
ÎÎPCIe 3.0, 2.0 and 1.0 compliant
ÎÎProgrammable output amplitude and slew rate
ÎÎCore supply voltage of 3.3V +/-10%
ÎÎOutput supply voltage of 1.8V, 2.5V and 3.3V
ÎÎIndustrial ambient operation temperature
ÎÎAvailable in lead-free package: 32-TQFN
Block Diagram
Description
The PI6CDBL401B is a 4-output low power buffer for 100MHz
PCIe Gen1, Gen2 and Gen3 applications with integrated output
terminations providing Zo=100Ω. The device has 4 output en-
ables for clock management, and 3 selectable SMBus addresses.
Applications
ÎÎPCIe 3.0/2.0/1.0 clock distribution
OE(3:0)#
CLK_IN
CLK_IN#
SADR_tri
HIBW_BYPM_LOBW#
CKPWRGD_PD#
SDATA_3.3
SCLK_3.3
CONTROL
LOGIC
ZDB PLL
4
CLK(3:0)
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16-0064
1
www.pericom.com
PI6CDBL401B Rev.C
03/23/16