PI6C49S1506 Datasheet, PDF (1/14 Pages) Pericom Semiconductor Corporation – High Performance Differential Fanout Buffer

PI6C49S1506
High Performance Differential Fanout Buffer
Features
ÎÎ6 differential outputs with 2 banks
ÎÎUser configurable output signaling standard for each bank:
LVDS or LVPECL or HCSL
ÎÎUp to 1.5GHz output frequency for differential outputs
ÎÎUltra low additive phase jitter: < 0.03 ps (typ) (differential
156.25MHz, 12KHz to 20MHz integration range)
ÎÎSelectable reference inputs support either single-ended
or differential or Xtal
ÎÎLow skew between outputs within banks (<40ps)
ÎÎLow delay from input to output (Tpd typ. 1.5ns)
ÎÎSeparate Input output supply voltage for level shifting
ÎÎ2.5V / 3.3V power supply
ÎÎIndustrial temperature support
ÎÎTQFP-32 package
Description
The PI6C49S1506 is a high performance fanout buffer device-
which supports up to 1.5GHz frequency. It also integrates a
unique feature with user configurable output signaling stan-
dards on per bank basis which provide great flexibilities to
users. The device also uses Pericom's proprietary input detection
technique to make sure illegal input conditions will be detected
and reflected by output states. This device is ideal for systems
that need to distribute low jitter clock signals to multiple desti-
nations.
Applications
ÎÎNetworking systems including switches and Routers
ÎÎHigh frequency backplane based computing and telecom
platforms
Block Diagram
Pin Configuration (32-Pin TQFP)
XT
XTN
OSC
CLK0
nCLK0
CLK1
nCLK1
CLK_SEL[1:0]
Iref
OPMODEA[1:0]
QA[0:2]
3
OPMODEB[1:0]
QB[0:2]
3
VDDO 1
nQA1 2
QA1 3
VEE 4
nQA0 5
QA0 6
CLK_SEL0 7
VEE 8
24 VDDO
23 QB1
22 nQB1
21 VDDO
20 QB2
19 nQB2
18 CLK_SEL1
17 IREF
14-0121
1
PI6C49S1506
Rev C
08/11/14