PI6C4911510-05 Datasheet, PDF (1/7 Pages) Pericom Semiconductor Corporation – 2.5V/3.3V 1.5GHz Low Skew 1-to-10 Differential to LVPECL Fanout Buffer with Sync OE

PI6C4911510-05
2.5V/3.3V 1.5GHz Low Skew 1-to-10 Differential to LVPECL
Fanout Buffer with Sync OE
Features
ÎÎF_MAX < 1.5GHz
ÎÎ10 pairs of differential LVPECL/ ECL outputs
ÎÎLow additive jitter, < 0.03ps (typ)
ÎÎSelectable differential input pairs with single ended input
option
ÎÎInput CLK accepts: LVPECL, LVDS, CML, SSTL input level
ÎÎOutput skew: 55ps (max)
ÎÎOperating Temperature: -40^oC to 85^oC
ÎÎECL mode operating voltage range
V_DD/ V_DDO = 0V, V_EE = -3.6V to -2.375V
ÎÎPower supply: 3.3V ±10% or 2.5V ±5%
ÎÎPackaging (Pb-free & Green), 32-pin TQFP available
Description
The PI6C4911510-05 is a high-performance low-skew 1-to-10 LVPE-
CL/ECLfanout buffer. The PI6C4911510-05 features two selectable
differential clock inputs and translates to ten LVPECL/ ECL outputs.
The CLK inputs accept LVPECL, LVDS, CML and SSTL signals.
PI6C4911510-05 is ideal for clock distribution applications such
as providing fanout for low noise Pericom oscillators.
Block Diagram
CLK0
nCLK0
CLK1
nCLK1
CLK_SEL
SYNC_OE
0
1
D
Q
LE
13-0151
Q0+
Q0-
Q1+
Q1-
Q2+
Q2-
Q3+
Q3-
Q4+
Q4-
Q5+
Q5-
Q6+
Q6-
Q7+
Q7-
Q8+
Q8-
Q9+
Q9-
Pin Configuration
VDD 1
CLK_SEL 2
CLK0 3
nCLK0 4
SYNC_OE 5
CLK1 6
nCLK1 7
VEE 8
24 _Q3+
23 _Q3-
22 _Q4+
21 _Q4-
20 _Q5+
19 _Q5-
18 _Q6+
17 _Q6-
1
PI6C4911510-05 Rev C 10/09/2013