PI6C48535-01 Datasheet, PDF (1/5 Pages) Pericom Semiconductor Corporation – 3.3V Low Skew 1-to-4 LVTTL/LVCMOS to LVPECL Fanout Buffer

Features
• Maximum operation frequency: 500 MHz
• 4 pair of differential LVPECL outputs
• Selectable CLK₀ and CLK₁ inputs
• CLK₀, CLK₁ accept LVCMOS, LVTTL input level
• Output Skew: 80ps (maximum)
• Part-to-part skew: 150ps (maximum)
• Propagation delay: 1.9ns (maximum)
• 3.3V power supply
• Pin-to-pin compatible to ICS8535-01
• Operating Temperature: -40^oC to 85^oC
• Packaging (Pb-free & Green available):
— 20-pin TSSOP (L)
PI6C48535-01
3.3V Low Skew 1-to-4
LVTTL/LVCMOS to LVPECL Fanout Buffer
Description
The PI6C48535-01 is a high-performance low-skew LVPECL
fanout buffer. PI6C48535-01 features two selectable single-ended
clock inputs and translates to four LVPECL outputs. The CLK₀
and CLK₁ inputs accept LVCMOS or LVTTL signals. The outputs
are synchronized with input clock during asynchronous assertion/
deassertion of CLK_EN pin. PI6C48535-01 is ideal for single-
ended LVTTL/LVCMOS to LVPECL translations. Typical clock
translation and distribution applications are data-communications
and telecommunications.
Block Diagram
CLK_EN
CLK
CLK1
D
Q
LE
0
1
CLK_SEL
Pin Configuration
V_EE 1
CLK_EN 2
CLK_SEL 3
Q0
CLK0 4
n^Q0
NC 5
Q1
nQ1
CLK1 6
NC 7
NC 8
Q2
NC 9
nQ2
VCC 10
Q₃
nQ3
20 Q0
19 NQ0
18 VCC
17 Q1
16 NQ1
15 Q2
14 NQ2
13 VCC
12 Q3
11 NQ3
1
PS8735A
11/15/05