PI6C4512 Datasheet, PDF (1/4 Pages) Pericom Semiconductor Corporation – PLL Clock Multiplier

Features
• Zero ppm multiplication error
• Input crystal frequency range: 5 - 30MHz
• Input clock frequency range: 4 - 50MHz
• Output clock frequencies range ≤ 200MHz
• Period jitter ≤ 100ps (typ)
• 9 Selectable frequencies controlled by S₀ and S₁ pins
• Supply voltage: 3.3V ±10% or 5.0V ±10%
• Packaging (Pb-Free and Green):
—8-pin SOIC (W)
PI6C4512
PLL Clock Multiplier
Description
The PI6C4512 is a precision general-purpose clock synthesizer with
fmax≤ 200MHz. The PI6C4512 uses an external low-cost crystal
to generate a very accurate rate and stable system clocks.
Block Diagram
S0
S₁
X1 / ICLK
X2
PLL Clock Synthesis
and
Control Circuit
Crystal
Oscillator
Output
Buffer
Output
Buffer
Pin Configuration
CLK
REF
X1 / ICLK 1
VCC
2
GND 3
REF 4
8 X2
7
S1
6
S0
5 CLK
Clock Output Table⁽¹⁾
S₁
S₀
0
0
0
M
0
1
M
0
M
M
M
1
1
0
1
M
1
1
Notes:
1. M = Mid-level (unconnected, biases to V_CC/2).
CLK
x4
x (16/3)
x5
x 2.5
x2
x (10/3)
x6
x3
x8
06-0034
1
PS8763B
03/30/06