PI6C41202 Datasheet, PDF (1/11 Pages) Pericom Semiconductor Corporation – LVCMOS to LVPECL Driver

PI6C41202
PI6C41204
PI6C41204A
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LVCMOS to LVPECL Driver
Features
• Up to Four LVPECL outputs
• Selectable CLK0 or CLK1 inputs
• LVCMOS or LVTTL input level
• 30ps max output skew
• 150ps max part-to-part skew
• 1.9ns max propagation delay
• 266 MHz output frequency
• Packaging (Pb-free & Green available):
-14-pin TSSOP
- 20-pin TSSOP
Block Diagram PI6C41204/A
CLK_EN
CLK0
CLK1
D
Q
LE
0
1
CLK_SEL
Description
PI6C4120x is a high-performance LVCMOS or LVTTL to LVPECL
clock buffer. The PI6C41204 is a 4 output version with 2 select-
able inputs, pin compatible with ICS8535-01. PI6C41204A is the
enhanced version with extra power and ground pins to minimize
noise and jitter. The PI6C41202 is similar to the PI6C41204 except
it has two outputs.
Pin Configuration PI6C41204/A
Vee
1
20
Q0
CLK_EN
2
19
nQ0
Q0
CK_SEL
3
18
Vcc
nQ0
CLK0
4
17
Q1
nc/Vee
5 ^20-Pin 16
nQ1
Q1
nQ1
CLK1
6
15
Q2
Q2
nc/Vee
7
14
nQ2
nQ2
nc/Vee
8
13
Vcc
Q3
nc/Vcc
9
12
Q3
nQ3
Vcc
10
11
nQ3
Block Diagram PI6C41202
CLK_EN
CLK0
CLK1
D
Q
LE
0
1
CLK_SEL
Pin Configuration PI6C41202
Vee
1
14
Vcc
CLK_EN 2
13
Q0
CK_SEL
3 _14-Pin 12
nQ0
Q0
CLK0
4
11
nc
nQ0
Vee
5
10
Q1
Q1
CLK1
6
9
nQ1
nQ1
Vcc
7
8
Vcc
1
PS8626D 05/11/05