PI6C103 Datasheet, PDF (1/12 Pages) Pericom Semiconductor Corporation – Precision Clock Synthesizer

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Precision Clock Synthesizer
for Mobile PCs
Features
• Two copies of CPU clock
• 100 MHz or 66.6 MHz operation
• Six copies of PCI clock, (synchronous with CPU clock)
• Two copies of REF clock @ 14.31818 MHz
• One copy of 48 MHz
• One copy of selectable 48/24 MHz
• Power management control input pins
• Isolated core V_DD, V_SS pins for noise reduction
• 28-pin SSOP (H) and TSSOP (L) packages
• SSC Options:
Device
PI6C103
PI6C103-05
PI6C103-06
66 MHz
–0.67%
–1.35%
–1.79%
100 MHz
–0.65%
–1.35%
–1.79%
Description
The PI6C103 is a high-speed, low-noise clock generator designed
to work with the PI6C18X clock buffer to meet all clock needs
for Mobile Intel Architecture platforms. System clock frequencies
of 66.6 MHz and 100 MHz are supported.
Split supplies of 3.3V and 2.5V are used. The 3.3V power supply
powers everything except the CPU clock. The 2.5V power supply is
used to power the CPUCLK outputs. 2.5V signaling follows JEDEC
standard 8-X. Power sequencing of the 3.3V and 2.5V supplies is
not required.
An asynchronous PWR_DWN# signal may be used to orderly
power down (or up) the system. CPU and PCI clocks may also be
stopped by the CPU_STOP# and PCI_STOP# signals.
The PI6C103 contains the Spread Spectrum function for only those
clocks that synchronize to the CPU clocks (CPU and PCI clocks).
Block Diagram
Pin Configuration
XTAL_IN _REF
XTAL_OUT ^OSC
SPREAD#
SEL100/66#
PLL1
DIV ^CPU_STOP#
PCI_STOP#
PWR_DWN#
TS#
PLL2
SEL48#
MUX
÷2
2 _REF
[0:1]
2 _CPUCLK
[0:1]
5 _PCICLK
[1:5]
PCICLK_F
48 MHz
48/24 MHz
V_SS 1
XTAL_IN 2
XTAL_OUT 3
PCICLK_F 4
PCICLK1 5
PCICLK2 6
V_{SS 7}
V_{DD 8}
PCICLK3 9
PCICLK4 10
PCICLK5 11
V_DD 12
48 MHz 13
48-24MHz/TS# 14
28-Pin
H, L
28 V_DD
27 REF1/SEL48#
26 REF0/Spread#
25 V_DD2
24 CPUCLK0
23 CPUCLK1
22 V_SS2
21 V_SS
20 PCI_STOP#
19 V_DD
18 CPU_STOP#
17 PWR_DWN#
16 SEL100/66#
15 V_SS
222
PS8315-2 04/08/99