PI6C102 Datasheet, PDF (1/11 Pages) Pericom Semiconductor Corporation – Precision Clock Synthesizer for Mobile PCs

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Precision Clock Synthesizer
for Mobile PCs
Features
• Two copies of CPU clock with V_DD of 2.5V ±5%
• 100 MHz or 66.6 MHz operation
• Six copies of PCI clock, (synchronous with CPU clock) 3.3V
• One copy of Ref. Clock @ 14.31818 MHz (3.3V_TTL)
• Low cost 14.31818 MHz crystal oscillator input
• Power management control
• Isolated core V_DD, V_SS pins for noise reduction
• 28-pin SSOP package (H)
Description
The PI6C102 is a high-speed low-noise clock generator designed
to work with the Pericom's PI6C18x clock buffer to meet all clock
needs for Mobile Intel Architecture platforms. CPU and chipset
clock frequencies of 66.6 MHz and 100 MHz are supported.
Split supplies of 3.3V and 2.5V are used. The 3.3V power supply
powers a portion of the I/O and the core. The 2.5V is used to power
the remaining outputs. 2.5V signaling follows JEDEC standard 8-X.
Power sequencing of the 3.3V and 2.5V supplies is not required.
An asynchronous PWRDWN# signal may be used to orderly power
down (or up) the system.
Block Diagram
Pin Configuration
XTAL_IN
REF
XTAL_OUT _OSC
PWRDWN#
SEL
SEL100/66#
PLL1
*KBBAHI
VDDREF
REF
VDDCPU
CPUSTOP#
DIV VDDCPU0,1
PCISTOP#
2 _CPUCLK
[0:1]
5 _PCICLK
[1:5]
PCICLK_F
XTAL_IN 1
XTAL_OUT 2
VSSPCI0 3
PCICLK_F 4
PCICLK1 5
VDDPCI0 6
PCICLK2 7
PCICLK3 8
VDDPCI1 9
PCICLK4 10
PCICLK5 11
VSSPCI1 12
VDDCORE0 13
VSSCORE0 ¹⁴
28-Pin
H
28 VSSREF
27 VDDREF
26 REF
25 VDDCPU
24 CPUCLK0
23 CPUCLK1
22 VSSCPU
21 VDDCORE1
20 VSSCORE1
19 PCISTOP#
18 CPUSTOP#
17 PWRDWN#
16 SEL
15 SEL100/66#
1
PS8164A
09/29/00