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PI6C100 Datasheet, PDF (1/13 Pages) Pericom Semiconductor Corporation – Precision Clock Synthesizer for Desktop PC’s
PI6C100
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Precision Clock Synthesizer
for Desktop PC’s
Features
Description
• Four copies of CPU clock with VDD of 2.5V + 5%
• 100 MHz or 66 MHz operation
• Eight copies of PCI clock, (synchronous with CPU clock) 3.3V
• Two copies of IO APIC clock @14.31818 MHz
• Two copies of 48 MHz clock
• Three copies of Ref. clock @14.31818 MHz (3.3V TTL)
• Low cost 14.31818 MHz crystal oscillator input
The PI6C100 is a high-speed low-noise clock generator designed to
work with the PI6C180 clock buffer to meet all clock needs for Intel
Architecture platforms. CPU and chipset clock frequencies of 66.6
MHz and 100 MHz are supported.
Split supplies of 3.3V and 2.5V are used. The 3.3V power supply
powers a portion of the I/O and the core. The 2.5V is used to power
the remaining outputs. 2.5V signaling follows JEDEC standard
8-X. Power sequencing of the 3.3V and 2.5V supplies is not required.
• Spread spectrum modulation of CPU and PCI clocks for
reduced EMI
• Power management control
An asynchronous PWRDWN# signal may be used to orderly power
down (or up) the system.
• Isolated core VDD, VSS pins for noise reduction
• 48-pin SSOP package (V48)
Block Diagram
XTAL_IN
XTAL_OUT
SEL0,1
SPREAD#
SEL100/66#
REF
OSC
PLL1
PLL2
*KBBAHI
VDDREF
VDDAPIC
VDDCPU 0,1
CPUSTOP#
÷2 VDDPCI 0,1
PCISTOP#
3 REF[0:2]
2 APIC0,1
4 CPUCLK[0:3]
7 PCICLK[1:7]
PCICLK_F
VDD48MHz
2 48MHz
Pin Configuration
REF0
REF1
VSSREF
XTAL_IN
XTAL_OUT
VSSPCI0
PCICLK_F
PCICLK1
VDDPCI0
PCICLK2
PCICLK3
VSSPCI1
PCICLK4
PCICLK5
VDDPCI1
PCICLK6
PCICLK7
VSSPCI2
VDDCORE0
VSSCORE0
VDD48MHz
48MHz
48MHz
VSS48MHz
1
48
2
47
3
46
4
45
5
44
6
43
7
42
8
41
9 48-Pin 40
10 V48 39
11
38
12
37
13
36
14
35
15
34
16
33
17
32
18
31
19
30
20
29
21
28
22
27
23
26
24
25
VDDREF
REF2
VDDAPIC
APIC0
APIC1
VSSAPIC
NC
VDDCPU0
CPUCLK0
CPUCLK1
VSSCPU0
VDDCPU1
CPUCLK2
CPUCLK3
VSSCPU1
VDDCORE1
VSSCORE1
PCISTOP#
CPUSTOP#
PWRDWN#
SPREAD#
SEL0
SEL1
SEL100/66#
198
PS8142A 10/13/98