PI4MSD5V9544A Datasheet, PDF (1/12 Pages) Pericom Semiconductor Corporation – 4 Channel I2C bus Multiplexer

PI4MSD5V9544A
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4 Channel I2C bus Multiplexer with interrupt logic
Features
 1-of-4 bidirectional translating multiplexer
 I2C-bus interface logic;
 Operating power supply voltage :1.65 V to 5.5 V
 Allows voltage level translation between 1.2V,
1.8V,2.5 V, 3.3 V and 5 V buses
 Low standby current
 Low Ron switches
 Channel selection via I2C bus
 Power-up with all multiplexer channels deselected
 Capacitance isolation when channel disabled
 No glitch on power-up
 Supports hot insertion
 5 V tolerant inputs
 0 Hz to 400 kHz clock frequency
 ESD protection exceeds 8000 V HBM per JESD22-
A114, and 1000 V CDM per JESD22-C101
 Latch-up testing is done to JEDEC Standard
JESD78 which exceeds 100 mA
 Packages offered: TSSOP-20L
Only one SCx/SDx channel is selected at a time,
determined by the contents of the programmable control
register. Four interrupt inputs, INT0 to INT3, one for
each of the SCx/SDx downstream pairs, are provided.
One interrupt output, INT, which acts as an AND of the
four interrupt inputs, is provided.
A power-on reset function puts the registers in their
default state and initializes the I2C bus state machine
with no channels selected. The pass gates of the
multiplexer are constructed such that the VCC pin can
be used to limit the maximum high voltage which will
be passed by the PI4MSD5V9544A. This allows the use
of different bus voltages on each SCx/SDx pair, so that
1.2V,1.8 V, 2.5 V or 3.3 V parts can communicate with
5 V parts without any additional protection.
External pull-up resistors pull the bus up to the
desired voltage level for each channel. All I/O pins are 5
V tolerant.
Pin Description
Description
The PI4MSD5V9544A is a 1-of-4 bidirectional
translating multiplexer, controlled via the I2C bus.
The SCL/SDA upstream pair fans out to four
SCx/SDx downstream pairs, or channels.
Pin Configuration
TSSOP20
Pin
No
Pin
Name
Type
Description
1
A0
Input address input 0
2
A1
Input address input 1
3
A2
Input address input 2
4
INT0 ^{Input active LOW interrupt input 0}
5
SD0
I/O serial data 0
6
SC0
I/O serial clock 0
7
INT1 ^{Input active LOW interrupt input 1}
8
SD1
I/O serial data 1
9
SC1
I/O serial clock 1
10 GND Ground supply ground
11
INT2
Input active LOW interrupt input 2
12
SD2
I/O serial data 2
13
SC2
I/O ^{serial clock 2}
14 _INT3 Input active LOW interrupt input 3
15
SD3
I/O serial data 3
16
SC3
I/O serial clock 3
17
INT
Output active LOW interrupt output
18
SCL
I/O serial clock line
19
SDA
I/O serial data line
20 VCC Power Power supply
2015-07-0035
PT0525-4 8/18/15
1