PI4IOE5V9535 Datasheet, PDF (1/16 Pages) Pericom Semiconductor Corporation – SMBus I/O port with interrupt

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PI4IOE5V9535
16-bit I²C-bus and SMBus I/O port with interrupt
Features
 Operation power supply voltage from 2.3V to 5.5V
 16-bit I/O pins which can be programmed as Input
or Output
 5V tolerant I/Os
 Polarity inversion register
 Active LOW interrupt output
 Low current consumption
 0Hz to 400KHz clock frequency
 Noise filter on SCL/SDA inputs
 Power-on reset
 ESD protection (4KV HBM and 1KV CDM)
 Latch-up tested (exceeds 100mA)
 Offered in two different packages: TSSOP-24 and
TQFN 4x4-24

Description
The PI4IOE5V9535 is a 24-pin device that
provides 16 bits of General Purpose parallel
Input/Output (GPIO) expansion for I²C-bus/SMBus
applications It includes the features such as higher
driving capability, 5V tolerance, lower power supply,
individual I/O configuration, and smaller packaging. It
provides a simple solution when additional I/O is
needed for ACPI power switches, sensors, push
buttons, LEDs, fans, etc.
The PI4IOE5V9535 consists of two 8-bit
Configuration (Input or Output selection), Input,
Output and Polarity Inversion (active HIGH or active
LOW operation) registers. The system master can
enable the I/Os as either inputs or outputs by writing to
the I/O configuration bits. The data for each input or
output is kept in the corresponding Input port or
Output port register. The polarity of the read register
can be inverted with the Polarity Inversion register. All
registers can be read by the system master.
The PI4IOE5V9535 is identical to the
PI4IOE5V9555 except for the removal of the internal
I/O pull-up resistor which greatly reduces power
consumption when the I/Os are held LOW.
The PI4IOE5V9535 open-drain interrupt output is
activated when any input state differs from its
corresponding Input Port register state and is used to
indicate to the system master that an input state has
changed. The power-on reset sets the registers to their
default values and initializes the device state machine.
Three hardware pins (A0, A1, A2) vary the fixed
I2C-bus address and allow up to eight devices to share
the same I2C-bus/SMBus. The fixed I2C-bus address
of the PI4IOE5V9535 are the same as the
PI4IOE5V9535 allowing up to eight of these devices
in any combination to share the same I2C-bus/SMBus.
Pin Configuration
Figure 1: TSSOP-24 ( Top View )
2016-01-0026
Figure 2: TQFN 4x4-24 ( Top View )
PT0561-2
1
02/15/16