PI4GTL2014 Datasheet, PDF (1/10 Pages) Pericom Semiconductor Corporation – 4-bit LVTTL to GTL transceiver

PI4GTL2014
Preliminary Datasheet
4-bit LVTTL to GTL transceiver
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Features
 Operates as a 4-bit GTL − /GTL/GTL+ sampling
receiver or as a LVTTL to GTL − /GTL/GTL+ driver
 2.3 V to 3.6 V operation with 5 V tolerant LVTTL
input
 GTL input and output 3.6 V tolerant
 Vref adjustable from 0.5 V to VCC/2
 Partial power-down permitted
 ESD protection exceeds 2000 V HBM per JESD22-
A114 and 1000 V CDM per JESD22-CC101
 Latch-up protection exceeds 500 mA per JESD78
 Package offered: TSSOP14
Description
The PI4GTL2014 is a 4-bit translating transceiver
designed for 3.3 V LVTTL system interface with a GTL
− /GTL/GTL+ bus, where GTL − /GTL/GTL+ refers to
the reference voltage of the GTL bus and the
input/output voltage thresholds associated with it.
The direction pin allows the part to function as either
a GTL to LVTTL sampling receiver or as a LVTTL to
GTL interface.
The PI4GTL2014 LVTTL inputs (only) are tolerant
up to 5.5 V allowing direct access to TTL or 5 V CMOS
inputs. The LVTTL outputs are not 5.5 V tolerant.
The PI4GTL2014 GTL inputs and outputs operate up
to 3.6 V, allowing the device to be used in higher
voltage open-drain output applications.
Pin Configuration
Pin Description
DIR
B0
B1
B2
B3
A0
A1
A2
A3
VREF
GND
VCC
1
2
3
5
6
13
12
10
9
4
7,8,11
14
direction control input (LVTTL)
data inputs/outputs (GTL)
data inputs/outputs (LVTTL)
GTL reference voltage
ground (0 V)
positive supply voltage
2015-11-0001
PT0568-1 12/11/15
1