|
PI49FCT3807D Datasheet, PDF (1/6 Pages) Pericom Semiconductor Corporation – 1-10 Clock Buffer for Networking Applications | |||
|
PI49FCT3807D
1122334455667788990011223344556677889900112233445566778899001122112233445566778899001122334455667788990011223344556677889900112211223344556677889900112233445566778899001122334455667788990011221122334455667788990011223344556677889900112233445566778899001122112233445566778899001122
1-10 Clock Buffer for Networking Applications
Product Features
 High Frequency >156 MHz
 High-speed, low-noise, non-inverting 1-10 buffer
 Low-skew (<250ps) between any two output clocks
 Low duty cycle distortion <250ps
 Low propagation delay <2.5ns
 Multiple VDD, GND pins for noise reduction
 3.3V supply voltage
 Available in SOIC, SSOP, and QSOP packages
Description
The PI49FCT3807D is a 3.3V compatible, high-speed, low-noise
1-10 non-inverting clock buffer. The key goal in designing the
PI6C3807D is to target networking applications that require low-
skew, low-jitter, and high-frequency clock distribution. Providing
output-to-output skew as low as 150ps, the PI49FCT3807D is an
ideal clock distribution device for synchronous systems. Design-
ing synchronous networking systems requires a tight level of skew
from a large number of outputs.
Block Diagram
BUF_IN
CLK0
CLK1
CLK2
CLK3
CLK9
Pin Configuration
BUF_IN 1
GND 2
CLK0 3
VDD 4
CLK1 5
GND 6
CLK2 7
VDD 8
CLK3 9
GND 10
20-Pin
H,Q,S
20 VDD
19 CLK9
18 CLK8
17 GND
16 CLK7
15 VDD
14 CLK6
13 GND
12 CLK5
11 CLK4
1
PS8493 08/09/00
|
▷ |