PI49FCT20807_14 Datasheet, PDF (1/6 Pages) Pericom Semiconductor Corporation – 1-10 Clock Buffer for Networking Applications

PI49FCT20807
1-10 Clock Buffer for Networking Applications
Features
• High Frequency>150 MHz
• High-speed, low-noise, non-inverting 1-10 buffer
• Low-skew (<150ps) between any two output clocks
• Low duty cycle distortion <300ps
• Low propagation delay <3.5ns
• Multiple V_DD, GND pins for noise reduction
• 2.5V supply voltage and 3V tolerant input
• Packaging (Pb-free & Green available):
-20-pin SSOP (H)
-20-pin QSOP (Q)
Block Diagram
BUF_IN
CLK0
CLK1
CLK2
CLK3
CLK9
Description
The PI49FCT20807, a 2.5V compatible, high-speed, low-noise
1-10 non-inverting clock buffer, is designed to target networking
applications that require low-skew, low-jitter, and high-frequen-
cy clock distribution. Providing output-to-output skew as low as
150ps, the PI49FCT20807 is an ideal clock distribution device for
synchronous systems. Designing synchronous networking sys-
tems requires a tight level of skew from a large number of outputs.
Pin Description
Pin Name
BUF_IN
CLK [0:9]
GND
V_DD
Description
Input
Outputs
Ground
Power
Pin Configuration
BUF_IN ₁
GND ₂
CLK0 ₃
20 VDD
19 ^CLK9
18 CLK8
VDD 4
CLK1 ₅
GND ₆
17 GND
20-Pin
H, Q ^{16 CLK7}
15 VDD
CLK2 ₇
14 CLK6
VDD 8
CLK3 ₉
13 GND
12 CLK5
GND ₁₀
11 CLK4
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www.pericom.com 09/25/14