PI3USB42 Datasheet, PDF (1/7 Pages) Pericom Semiconductor Corporation – USB2.0 High-Speed (480Mbps) Signal Switch With Vbus Short Protection

PI3USB42
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USB2.0 High-Speed (480Mbps) Signal Switch With Vbus Short Protection
Features
• USB 2.0 compliant (high speed and full speed)
• R_ON is 4.0Ω typical @ V_DD = 3.0V
• Low bit-to-bit skew
• Low Crosstalk: -41dB @ 240 MHz
• Off Isolation: -37dB @ 240 MHz
• Wide -3db bandwidth: 770MHz
• Near-Zero propagation delay: 250ps
• Support for 1.8V/2.5V/3.3V Logic on Control pins
• Channel On Capacitance: 6.0pF
• VDD Operating Range: 1.8V to 4.3V ±10%
• Data pin I/O ESD: >8kV HBM protection per
JESD22-A114D specification
• I/O pins have over-voltage protection and can
tolerate a short to Vbus
• Packaging (Pb-free & Green): 10-pin UQFN (ZM10)
Applications
• Route signals for USB 2.0
• Cell phone, PDA, Digital camera and Notebook
• LCD Monitor ,TV, Set-top box
• Portable device
Pin Description
Pin No
1
2
3
4
5
6
7
8
9
10
Pin
Name
D+
D-
GND
D-A
D+A
D-B
D+B
/OE
V_DD
SEL
Description
USB Data bus
USB Data bus
Ground
Multiplexed Source Inputs
Multiplexed Source Inputs
Multiplexed Source Inputs
Multiplexed Source Inputs
Switch Enable
Positive Power Supply
Switch Select
Description
The PI3USB42 is a single differential channel 2:1
multiplexer/demultiplexer USB 2.0 Switch. Industry
leading advantages include a propagation delay of less
than 250ps, resulting from its low channel resistance and
I/O capacitance. The device multiplexes differential
outputs from a USB Host device to one of two
corresponding outputs. The switch is bidirectional and
offers little or no attenuation of the high-speed signals at
the outputs. It is designed for low bit-to-bit skew, high
channel-to-channel noise isolation and is compatible
with various standards, such as High Speed USB 2.0
(480 Mb/s).
The PI3USB42 offers overvoltage protection per the
USB2.0 specification. With the chip powered on or off,
all I/O pins can withstand a short to Vbus (5V +/-10%).
If VDD=0V, the I/Os can still have signals present, and
the signal will NOT leak through to VDD.
Functional Block Diagram
D+
D-
SEL
LOGIC
D+A
D+B
D-A
D-B
/OE
Pin Assignment
Logic Function Table
/OE
SEL Function
H
X
I/O’s = Hi-Z
L
L
D(+/-) to D(+/-)A
L
H
D(+/-) to D(+/-)B
2011-11-0004
PT0378-1 8/26/11
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